Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2003
08/07/2003US20030149547 Method for diagnosing failure of a manufacturing apparatus and a failure diagnosis system
08/07/2003US20030149506 Method and system to process semiconductor wafers
08/07/2003US20030149503 Production planning system
08/07/2003US20030149213 Providing a neutral to weakly acidic polymerization inhibitor; used in a chemical vapor deposition process for silicon oxides in electronic material fabrication
08/07/2003US20030149135 No-flow underfill encapsulant
08/07/2003US20030148910 Low surface tension, low viscosity, aqueous, acidic compositions containing fluoride and organic, polar solvents for removal of photoresist and organic and inorganic etch residues at room temperature
08/07/2003US20030148904 Cured polymers dissolving compositions
08/07/2003US20030148870 Silicon nitride sintered material and process for production thereof
08/07/2003US20030148718 Polishing head and chemical mechanical polishing apparatus including the same
08/07/2003US20030148714 Method and apparatus for dry-in, dry-out polishing and washing of a semiconductor device
08/07/2003US20030148707 Dressing apparatus and polishing apparatus
08/07/2003US20030148635 Method of manufacturing integrated circuit
08/07/2003US20030148634 Process for the heat treatment of a silicon wafer, and silicon wafer produced
08/07/2003US20030148633 Gate structure and method
08/07/2003US20030148632 Method for avoiding the ion penetration with the plasma doping
08/07/2003US20030148631 Oxidative annealing method for forming etched spin-on-glass (SOG) planarizing layer with uniform etch profile
08/07/2003US20030148630 Self-grown hydrophobic nano molecule organic diffusion barrier and method of the same
08/07/2003US20030148629 Flash memory device and fabrication process thereof, method of forming a dielectric film
08/07/2003US20030148628 UV-enhanced oxy-nitridation of semiconductor substrates
08/07/2003US20030148627 Method for removing contamination and method for fabricating semiconductor device
08/07/2003US20030148626 Fabrication method of semiconductor integrated circuit device
08/07/2003US20030148625 Method for wet etching of high k thin film at low temperature
08/07/2003US20030148624 Method for removing resists
08/07/2003US20030148623 Plasma processing device
08/07/2003US20030148622 High selectivity and residue free process for metal on thin dielectric gate etch application
08/07/2003US20030148621 Method of surface treatment of semiconductor
08/07/2003US20030148619 Method using wet etching to trim a critical dimension
08/07/2003US20030148618 Selective metal passivated copper interconnect with zero etch stops
08/07/2003US20030148617 Method of forming small transistor gates by using self-aligned reverse spacer as a hard mask
08/07/2003US20030148616 A CMP oxide slurry includes an aqueous solution containing abrasive particles and two or more different passivation agents. Preferably, the aqueous solution is made up of deionized water, and the abrasive particles are a metal oxide
08/07/2003US20030148615 Chemical mechanical polisher equipped with chilled retaining ring and method of using
08/07/2003US20030148614 Polyelectrolyte dispensing polishing pad, production thereof and method of polishing a substrate
08/07/2003US20030148613 Wireless communications system and method of making
08/07/2003US20030148611 Etch rate uniformity
08/07/2003US20030148610 Method and production of a sensor
08/07/2003US20030148609 Multi-layer film stack polish stop
08/07/2003US20030148608 Method of manufacturing integrated circuit
08/07/2003US20030148607 Metallic film forming method and semiconductor device manufacturing method
08/07/2003US20030148606 Cobalt silicide fabrication methods that use protective titanium layers
08/07/2003US20030148605 Method of forming an oxidation-resistant TiSiN film
08/07/2003US20030148604 Chip structure and process for forming the same
08/07/2003US20030148603 Novel interconnection structures and methods of fabrication
08/07/2003US20030148602 Method for making interconnect structures
08/07/2003US20030148601 Fill material for dual damascene processes
08/07/2003US20030148600 Method of forming conductive layers in the trenches or through holes made in an insulating film on a semiconductor substrate
08/07/2003US20030148599 Method for bumped die and wire bonded board-on-chip package
08/07/2003US20030148598 Methods of fabricating highly conductive regions in semiconductor substrates for radio frequency applications
08/07/2003US20030148596 Wafer bonding for three-dimensional (3D) integration
08/07/2003US20030148595 Semiconductor substrate processing method
08/07/2003US20030148594 Laser apparatus, laser irradiating method, manufacturing method of semiconductor device, semiconductor device, manufacturing system of semiconductor device using the laser apparatus, and electronic device
08/07/2003US20030148593 Electrode connection method, electrode surface activation apparatus, electrode connection apparatus, connection method of electronic components and connected structure
08/07/2003US20030148592 Method for bonding a pair of silicon wafers together, and a semiconductor wafer
08/07/2003US20030148591 Method of forming semiconductor device
08/07/2003US20030148590 Barrier structure against corrosion and contamination in three-dimensional (3-D) wafer-to-wafer vertical stack
08/07/2003US20030148589 Chemical mechanical polishing for forming a shallow trench isolation structure
08/07/2003US20030148588 Process for manufacturing low-cost and high-quality SOI substrates
08/07/2003US20030148587 Semiconductor integrated circuit device and method of manufacturing involving the scale-down width of shallow groove isolation using round processing
08/07/2003US20030148586 Manufacturing method for buried insulating layer-type semiconductor silicon carbide substrate and manufacturing apparatus thereof
08/07/2003US20030148585 Method of preventing leakage current of a metal-oxide semiconductor transistor
08/07/2003US20030148584 Technique to obtain high mobility channels in MOS transistors by forming a strain layer on an underside of a channel
08/07/2003US20030148583 Non-volatile semiconductor memory and method of making same, and semiconductor device and method of making device
08/07/2003US20030148582 Memory cell fabrication method and memory cell configuration
08/07/2003US20030148581 Capacitors of semiconductor devices and methods of fabricating the same
08/07/2003US20030148580 Method of forming a bottle-shaped trench in a semiconductor substrate
08/07/2003US20030148579 Semiconductor device and method of manufacturing the same
08/07/2003US20030148577 Controlled alignment of catalytically grown nanostructures in a large-scale synthesis process
08/07/2003US20030148576 Method to modify 0.25 mum 1T-RAM by extra resist protect oxide (RPO) blocking
08/07/2003US20030148575 Methods of accessing floating-gate memory cells having underlying source-line connections
08/07/2003US20030148573 Thin film transistor and manufacturing method of thin film transistor
08/07/2003US20030148572 Semiconductor device and method of manufacturing the same
08/07/2003US20030148571 Method for avoiding the ion penetration with the plasma doping
08/07/2003US20030148568 Flash memory device and fabrication process thereof, method of forming a dielectric film
08/07/2003US20030148567 Poly-silicon thin film transistor having back bias effects and fabrication method thereof
08/07/2003US20030148566 Production method for flat panel display
08/07/2003US20030148565 Method for forming thin semiconductor film, method for fabricating semiconductor device, system for executing these methods and electrooptic device
08/07/2003US20030148564 Method for suppressing short channel effect of a semiconductor device
08/07/2003US20030148563 Transistor, semiconductor device and manufacturing method of semiconductor device
08/07/2003US20030148562 Field effect transistor
08/07/2003US20030148561 Semiconductor device and manufacturing method thereof
08/07/2003US20030148560 Thin film transistors and method of manufacture
08/07/2003US20030148559 Semiconductor device and the method of manufacturing the same
08/07/2003US20030148558 Integrated circuit and method of manufacturing thereof
08/07/2003US20030148556 Method and system for exposed die molding for integrated circuit packaging
08/07/2003US20030148553 Methods for dicing wafer stacks to provide access to interior structures
08/07/2003US20030148551 Surface treatment and protection method for cadmium zinc telluride crystals
08/07/2003US20030148549 Method of manufacturing integrated circuit
08/07/2003US20030148224 Semiconductor substrate having a photoresist mask formed thereon. The method also includes forming a conformal layer of polymer over the photoresist mask and a portion of the semiconductor substrate not covered by the photoresist mask
08/07/2003US20030148223 Integrated circuits is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a nitrogen source in the presence of an electric field. The as-deposited silicon carbide layer
08/07/2003US20030148221 Mask for manufacturing semiconductor device and method of manufacture thereof
08/07/2003US20030148220 Technique of exposing a resist using electron beams having different accelerating voltages, and method of manufacturing a photomask using the technique
08/07/2003US20030148212 Process for forming an ultra fine pattern using a bottom anti-reflective coating film containing an acid generator
08/07/2003US20030148206 Acid generator capable of generating an acid by irradiation with actinic ray or radiation and having a structure represented by formula (I) defined in the specification and (B) a resin having a monocyclic or polycyclic alicyclic
08/07/2003US20030148198 Evaluating and controlling a lithography process are provided. For example, a method for reducing within wafer variation of a critical metric of a lithography process may include measuring at least one property of a resist disposed on wafers
08/07/2003US20030148195 Forming a device pattern of a semiconductor device. The method includes the steps of carrying out an over-exposure to a resist film using a mask which has transmission regions which are positioned about a circumference of each of intended
08/07/2003US20030148193 Capable of implementing off-axis illumination (OAI), and a method of fabricating the same, are provided. The photomask includes a transparent substrate, a plurality of opaque patterns formed on the front surface of the transparent
08/07/2003US20030148035 Article for use in a semiconductor processing chamber and method of fabricating same
08/07/2003US20030148020 Method of depositing low dielectric constant silicon carbide layers
08/07/2003US20030148019 Form a thin film on a substrate. The colloid can be colloidal silica. The thin film can be a dielectric layer. The substrate can be a semiconductor substrate having gaps thereon.
08/07/2003US20030147856 Proteins
08/07/2003US20030147736 Suction unit
1 ... 4602 4603 4604 4605 4606 4607 4608 4609 4610 4611 4612 4613 4614 4615 4616 4617 4618 4619 4620 4621 4622 ... 6590