Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
08/2003
08/20/2003CN1118707C Integrated circuit device test handler
08/20/2003CN1118655C Dual-walled exhaust tube assembly for vacuum pump and restructuring method thereof
08/20/2003CN1118586C Electric arc type ion plating device
08/20/2003CN1118428C Integrated lobe internal conveying, storing and transfering apparatus
08/19/2003USRE38221 300 mm microenvironment pod with door on side
08/19/2003US6609244 Design method of a logic circuit
08/19/2003US6609241 Method of designing clock wiring
08/19/2003US6609237 Routing path finding method for automated routing/designing process and computer-readable storage medium having stored thereon routing path finding program
08/19/2003US6609232 Logic compound method and logic compound apparatus
08/19/2003US6608782 Booster circuit capable of achieving a stable pump operation for nonvolatile semiconductor memory device
08/19/2003US6608776 Thin film magnetic memory device having a highly integrated memory array
08/19/2003US6608746 Automatic discharge apparatus for residual charge on an electrostatic chuck
08/19/2003US6608745 Electrostatic chunks
08/19/2003US6608738 Magnetoresistance effect device utilizing an oxide film to produce antiferromagnetic exchange-coupling between first and second magnetic films in either the pinned layer or the free layer of the device
08/19/2003US6608691 Generation of exposure data having hierarchical structure
08/19/2003US6608681 Exposure method and apparatus
08/19/2003US6608676 System for detecting anomalies and/or features of a surface
08/19/2003US6608667 Exposure apparatus and device manufacturing method
08/19/2003US6608666 Reference plate, exposure apparatus, device manufacturing system, device manufacturing method, semiconductor manufacturing factory, and exposure apparatus maintenance method
08/19/2003US6608658 Top gate TFT structure having light shielding layer and method to fabricate the same
08/19/2003US6608654 Methods of fabricating active matrix pixel electrodes
08/19/2003US6608653 Active matrix liquid crystal display device having reduced leak current and switching element used therein
08/19/2003US6608496 Reference transmission line junction for probing device
08/19/2003US6608391 Preparation method of underfill for flip chip package and the device
08/19/2003US6608389 Semiconductor device with stress relieving layer comprising circuit board and electronic instrument
08/19/2003US6608388 Delamination-preventing substrate and semiconductor package with the same
08/19/2003US6608385 Contact structure and production method thereof and probe contact assembly using same
08/19/2003US6608384 Semiconductor device and method of forming the same
08/19/2003US6608383 Semiconductor device including capacitor with lower electrode including iridium and iridium oxide layers
08/19/2003US6608382 Metal bump
08/19/2003US6608381 Integrated electronic device having flip-chip connection with circuit board and fabrication method thereof
08/19/2003US6608378 Formation of metal oxide gate dielectric
08/19/2003US6608377 Wafer level package including ground metal layer
08/19/2003US6608374 Semiconductor chip assembly with bumped conductive trace
08/19/2003US6608372 Surface mountable chip type semiconductor device and manufacturing method
08/19/2003US6608371 Simple electrical connection of miniature, stacked chips
08/19/2003US6608370 Semiconductor wafer having a thin die and tethers and methods of making the same
08/19/2003US6608369 Reliability
08/19/2003US6608368 Semiconductor device with power source conductor pattern and grounding conductor pattern
08/19/2003US6608366 Lead frame with plated end leads
08/19/2003US6608364 Semiconductor device comprising windings constituting inductors
08/19/2003US6608359 Semiconductor device incorporating hemispherical solid immersion lens, apparatus and method for manufacturing the same
08/19/2003US6608357 Heat resistance, low resistivity; wiring of tantalum material
08/19/2003US6608356 Semiconductor device using damascene technique and manufacturing method therefor
08/19/2003US6608355 Semiconductor integrated circuit having anti-fuse, method of fabricating, and method of writing data in the same
08/19/2003US6608354 Semiconductor device and method of manufacturing the same
08/19/2003US6608353 Thin film transistor having pixel electrode connected to a laminate structure
08/19/2003US6608352 Determination of thermal resistance for field effect transistor formed in SOI technology
08/19/2003US6608351 Semiconductor device comprising a high-voltage circuit element
08/19/2003US6608350 High voltage vertical conduction superjunction semiconductor device
08/19/2003US6608348 High speed; miniaturization
08/19/2003US6608347 Semiconductor device and method of manufacturing the same
08/19/2003US6608346 Method and structure for an improved floating gate memory cell
08/19/2003US6608345 Nonvolatile semiconductor memory device and semiconductor integrated circuit
08/19/2003US6608344 Structure and manufacturing method of semiconductor device having uneven surface at memory cell capacitor part
08/19/2003US6608343 Rough (high surface area) electrode from Ti and TiN, capacitors and semiconductor devices including same
08/19/2003US6608342 Container capacitor structure and method of formation thereof
08/19/2003US6608341 Reduced leakage currents
08/19/2003US6608340 Substrate assembly having a depression suitable for an integrated circuit configuration and method for its fabrication
08/19/2003US6608339 Ferroelectric memory element
08/19/2003US6608335 Grounded fill in a large scale integrated circuit
08/19/2003US6608327 Gallium nitride semiconductor structure including laterally offset patterned layers
08/19/2003US6608326 Semiconductor film, liquid-crystal display using semiconductor film, and method of manufacture thereof
08/19/2003US6608325 Transistor and semiconductor device having columnar crystals
08/19/2003US6608324 Display device having thin film transistors
08/19/2003US6608320 Electronics assembly apparatus with height sensing sensor
08/19/2003US6608317 Charged-particle-beam (CPB)-optical systems with improved shielding against stray magnetic fields, and CPB microlithography apparatus comprising same
08/19/2003US6608315 Mechanism for prevention of neutron radiation in ion implanter beamline
08/19/2003US6608313 Methods and devices for achieving alignment of a beam-propagation axis with a center of an aperture in a charged-particle-beam optical system
08/19/2003US6608287 Process chamber with rectangular temperature compensation ring
08/19/2003US6608283 Apparatus and method for solder-sealing an active matrix organic light emitting diode
08/19/2003US6608158 High transparency at 193 nm wavelength, provides increased etching resistance; formed without 5-norbonen-2-carboxylate monomers which do not have offensive odors of the free acid
08/19/2003US6608112 Batimastat BB94 ("Batimastat")
08/19/2003US6607993 Method using ultraviolet radiation for integrated circuit manufacturing
08/19/2003US6607992 Used to prevent the exposure light for exposing the resist from reflecting at a film lying under the resist
08/19/2003US6607991 Method for curing spin-on dielectric films utilizing electron beam radiation
08/19/2003US6607990 Semiconductor device and its manufacturing method
08/19/2003US6607989 Heat treatment redistributes Cu particles segregated in the Al-Cu alloy layer during the O2-plasma pretreatment, preventing occurrence of a short-circuit failure.
08/19/2003US6607988 Manufacturing method of semiconductor integrated circuit device
08/19/2003US6607987 Method for improving uniformity in batch processing of semiconductor wafers
08/19/2003US6607986 Laminating a first insulating layer containing carbon and a second insulating layer containing carbon on a substrate, patterning the second insulating layer into a preset shape, forming grooves in first layer by etching with reactive gas
08/19/2003US6607985 Gate stack and etch process
08/19/2003US6607984 Removable inorganic anti-reflection coating process
08/19/2003US6607983 Method of processing a defect source at a wafer edge region in a semiconductor manufacturing
08/19/2003US6607982 High magnesium content copper magnesium alloys as diffusion barriers
08/19/2003US6607981 Method for forming a Cu interconnect pattern
08/19/2003US6607980 Rapid-temperature pulsing anneal method at low temperature for fabricating layered superlattice materials and making electronic devices including same
08/19/2003US6607979 Semiconductor device and method of producing the same
08/19/2003US6607978 Method of making a semiconductor device with alloy film between barrier metal and interconnect
08/19/2003US6607977 Method of depositing a diffusion barrier for copper interconnect applications
08/19/2003US6607976 Copper interconnect barrier layer structure and formation method
08/19/2003US6607975 Device and method for protecting against oxidation of a conductive layer in said device
08/19/2003US6607974 Method of forming a contact structure in a semiconductor device
08/19/2003US6607973 Preparation of high-k nitride silicate layers by cyclic molecular layer deposition
08/19/2003US6607972 Method for producing an edge termination suitable for high voltages in a basic material wafer prefabricated according to the principle of lateral charge compensation
08/19/2003US6607971 Method for extending a laser annealing pulse
08/19/2003US6607970 Semiconductor device and method of manufacturing the same
08/19/2003US6607969 Method for making pyroelectric, electro-optical and decoupling capacitors using thin film transfer and hydrogen ion splitting techniques
08/19/2003US6607968 Method for making a silicon substrate comprising a buried thin silicon oxide film
08/19/2003US6607967 Process for forming planarized isolation trench in integrated circuit structure on semiconductor substrate
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