Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2003
11/25/2003US6653734 Convertible hot edge ring to improve low-K dielectric etch
11/25/2003US6653733 Conductors in semiconductor devices
11/25/2003US6653732 Electronic component having a semiconductor chip
11/25/2003US6653731 Semiconductor device and method for fabricating same
11/25/2003US6653729 Semiconductor device and test method for manufacturing same
11/25/2003US6653728 Tray for ball grid array semiconductor packages
11/25/2003US6653727 Semiconductor chip package with direction-flexible mountability
11/25/2003US6653725 Chip package and method of manufacturing the same
11/25/2003US6653723 System for providing an open-cavity low profile encapsulated semiconductor package
11/25/2003US6653722 Method for applying uniform pressurized film across wafer
11/25/2003US6653720 Semiconductor electronic parts
11/25/2003US6653719 Controlling gas flow; plasma polymerization
11/25/2003US6653718 Dielectric films for narrow gap-fill applications
11/25/2003US6653717 Enhancement in throughput and planarity during CMP using a dielectric stack containing an HDP oxide
11/25/2003US6653715 Bipolar transistor
11/25/2003US6653714 Lateral bipolar transistor
11/25/2003US6653713 Thin film resistor with stress compensation
11/25/2003US6653712 Three-dimensional memory array and method of fabrication
11/25/2003US6653709 CMOS output circuit with enhanced ESD protection using drain side implantation
11/25/2003US6653705 Aspherical microstructure, and method of fabricating the same
11/25/2003US6653703 Semiconductor memory device using magneto resistive element and method of manufacturing the same
11/25/2003US6653702 Semiconductor pressure sensor having strain gauge and circuit portion on semiconductor substrate
11/25/2003US6653701 Device comprising porous semiconductor layer, inorganic semiconductor layer, and organic substance layer in between, in which organic substance is adsorbed onto porous semiconductor layer, and semiconductors are of opposite type
11/25/2003US6653700 Forming intrinsic silicon film on insulating substrate, forming gate dielectric layer, gate electrode comprising thin mid-gap work function film, doped polysilicon film, forming pair of source/drain regions on opposite sides of silicon body
11/25/2003US6653699 Polysilicon/Amorphous silicon gate structures for integrated circuit field effect transistors
11/25/2003US6653698 Integration of dual workfunction metal gate CMOS devices
11/25/2003US6653696 Semiconductor device, memory system, and electronic instrument
11/25/2003US6653695 Semiconductor device with an improved gate electrode pattern
11/25/2003US6653694 Reference voltage semiconductor
11/25/2003US6653693 Semiconductor integrated circuit device
11/25/2003US6653691 Devices having plurality of field effect transistor unit cells which utilize Faraday shield layers to reduce parasitic gate-to-drain capacitance and concomitantly improve high frequency switching performance
11/25/2003US6653690 Semiconductor device comprising high density integrated circuit having a large number of insulated gate field effect transistors
11/25/2003US6653689 Semiconductor device having electrostatic protection circuit
11/25/2003US6653688 Semiconductor device
11/25/2003US6653687 Insulated gate semiconductor device
11/25/2003US6653686 Structure and method of controlling short-channel effect of very short channel MOSFET
11/25/2003US6653685 Nonvolatile memory device
11/25/2003US6653684 Integrated circuit including high-voltage and logic transistors and EPROM cells
11/25/2003US6653683 In-process memory device comprising floating gate layer, silicon dioxide layer, siliconized nitride layer having lower unsiliconized portion and upper siliconized portion, with increasing concentration of silicon atoms in upper portion
11/25/2003US6653682 Non-volatile electrically alterable semiconductor memory device
11/25/2003US6653681 Additional capacitance for MIM capacitors with no additional processing
11/25/2003US6653680 Storage electrode including tungsten silicide wall and large grained wall
11/25/2003US6653679 Reduced 1/f noise in MOSFETs
11/25/2003US6653678 Reduction of polysilicon stress in trench capacitors
11/25/2003US6653677 Semiconductor constructions
11/25/2003US6653676 Integrated circuit capacitor
11/25/2003US6653675 Dual gate dielectric construction
11/25/2003US6653674 Vertical source/drain contact semiconductor
11/25/2003US6653673 Programmable capacitor and method of operating same
11/25/2003US6653671 Semiconductor device
11/25/2003US6653669 Device for the adjustment of circuits after packaging
11/25/2003US6653668 Radio frequency modules and modules for moving target detection
11/25/2003US6653667 GaAs-based semiconductor field-effect transistor
11/25/2003US6653666 Vertical J-FET semiconductor configuration having region on surface including first contact with highly doped contact layer serving as source between two second contacts serving as gate; low-loss, fast, short circuit-proof switching element
11/25/2003US6653665 Substrate having semiconductor layer insulated by insulating film, thyristor with gate laterally formed in layer, transistor formed in layer and connected to one terminal of thyristor; small cell area
11/25/2003US6653664 Bandgap engineering of tfel devices
11/25/2003US6653661 Chip-type LED and process of manufacturing the same
11/25/2003US6653659 Silicon carbide inversion channel mosfets
11/25/2003US6653658 Electrical and electronic structures having improved thermoconductivity, comprising doped layers on germanium, sapphire, silicon and/or carbide substrates; heat exchangers
11/25/2003US6653657 Semiconductor device and a method of manufacturing the same
11/25/2003US6653656 Semiconductor device formed on insulating layer and method of manufacturing the same
11/25/2003US6653644 Pattern exposure method and apparatus
11/25/2003US6653643 Method and apparatus for improved ion acceleration in an ion implantation system
11/25/2003US6653642 Methods and apparatus for operating high energy accelerator in low energy mode
11/25/2003US6653639 Chuck for mounting reticle to a reticle stage
11/25/2003US6653610 Electric outfit room in microwave oven
11/25/2003US6653604 Heater member for mounting heating object and substrate processing apparatus using the same
11/25/2003US6653603 Heat generators used for heating semiconductor wafers during vapor deposition of thin films
11/25/2003US6653564 Conductor strip arrangement for a molded electronic component and process for molding
11/25/2003US6653418 Dissolving 4-acetoxystyrene monomer and dimethyl-2,2*-azobiscarboxylate ester in solvent; addition polymerization using alkali catalyst; hydrolysis, washing; heat resistance, sensitivity and resolution
11/25/2003US6653358 Electronics; integrated circuits; containing benzocyclobutene polymer
11/25/2003US6653267 Compound having a heterocycle (preferably quinaldic acid, benzotriazole or benzimidazole), surfactant and an oxidizing agent
11/25/2003US6653248 Doped semiconductor material, a method of manufacturing the doped semiconductor material, and a semiconductor device
11/25/2003US6653247 Dielectric layer for a semiconductor device and method of producing the same
11/25/2003US6653246 High dielectric constant materials
11/25/2003US6653245 Method for liquid phase deposition
11/25/2003US6653244 Monolithic three-dimensional structures
11/25/2003US6653243 Methods of cleaning surfaces of copper-containing materials, and methods of forming openings to copper-containing substrates
11/25/2003US6653242 Solution to metal re-deposition during substrate planarization
11/25/2003US6653241 Methods of forming protective segments of material, and etch stops
11/25/2003US6653240 FIB/RIE method for in-line circuit modification of microelectronic chips containing organic dielectric
11/25/2003US6653238 Method for forming semiconductor device having high-density contacts
11/25/2003US6653237 High resist-selectivity etch for silicon trench etch applications
11/25/2003US6653236 Methods of forming metal-containing films over surfaces of semiconductor substrates; and semiconductor constructions
11/25/2003US6653235 Fabricating process for forming multi-layered metal bumps by electroless plating
11/25/2003US6653234 Chemical vapor deposition of titanium from titanium tetrachloride and hydrocarbon reactants
11/25/2003US6653233 Process of providing a semiconductor device with electrical interconnection capability
11/25/2003US6653231 Process for reducing the critical dimensions of integrated circuit device features
11/25/2003US6653230 Semiconductor device having concave electrode and convex electrode and method of manufacturing thereof
11/25/2003US6653229 Integrated circuit with a recessed conductive layer
11/25/2003US6653228 Forming polymer layer on upper portion and side wall of photoresist mask, etching oxide layer under photoresist mask to form contact hole using difluoromethane gas
11/25/2003US6653227 Method of cobalt silicidation using an oxide-Titanium interlayer
11/25/2003US6653226 Method for electrochemical planarization of metal surfaces
11/25/2003US6653225 Method for forming gate electrode structure with improved profile and gate electrode structure therefor
11/25/2003US6653224 Methods for fabricating interconnect structures having Low K dielectric properties
11/25/2003US6653223 Dual damascene method employing void forming via filling dielectric layer
11/25/2003US6653222 Plasma enhanced liner
11/25/2003US6653221 Method of forming a ground in SOI structures
11/25/2003US6653220 Advance metallization process
11/25/2003US6653219 Method of manufacturing bump electrodes and a method of manufacturing a semiconductor device