Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
01/2004
01/06/2004US6674133 Twin bit cell flash memory device
01/06/2004US6674132 Memory cell and production method
01/06/2004US6674129 ESD diode structure
01/06/2004US6674128 Semiconductor-on-insulator device with thermoelectric cooler on surface
01/06/2004US6674127 Semiconductor integrated circuit
01/06/2004US6674125 Semiconductor power component and a corresponding manufacturing method
01/06/2004US6674124 Trench MOSFET having low gate charge
01/06/2004US6674122 Semiconductor integrated circuit
01/06/2004US6674121 Method and system for molecular charge storage field effect transistor
01/06/2004US6674120 Nonvolatile semiconductor memory device and method of operation thereof
01/06/2004US6674119 Non-volatile semiconductor memory device and semiconductor integrated circuit
01/06/2004US6674118 PIP capacitor for split-gate flash process
01/06/2004US6674117 Semiconductor element and semiconductor memory device using the same
01/06/2004US6674114 Semiconductor device and manufacturing method thereof
01/06/2004US6674113 Trench capacitor and method for manufacturing the same
01/06/2004US6674111 Annular etch stopper
01/06/2004US6674110 Single transistor ferroelectric memory cell, device and method for the formation of the same incorporating a high temperature ferroelectric gate dielectric
01/06/2004US6674108 Gate length control for semiconductor chip design
01/06/2004US6674106 Liquid crystal display and an organic electroluminescent display; pixels disposed in a matrix on a transparent base plate
01/06/2004US6674105 Semiconductor memory device and method of forming the same
01/06/2004US6674104 Bipolar transistor
01/06/2004US6674102 Sti pull-down to control SiGe facet growth
01/06/2004US6674100 SiGeC-based CMOSFET with separate heterojunctions
01/06/2004US6674099 Misfet
01/06/2004US6674098 ZnO compound semiconductor light emitting element
01/06/2004US6674093 Active matrix substrate and manufacturing method therefor
01/06/2004US6674090 Structure and method for planar lateral oxidation in active
01/06/2004US6674085 Gas-actuated stages including reaction-force-canceling mechanisms for use in charged-particle-beam microlithography systems
01/06/2004US6674081 Infrared detecting element, infrared two-dimensional image sensor, and method of manufacturing the same
01/06/2004US6674075 Charged particle beam apparatus and method for inspecting samples
01/06/2004US6674016 Electronic component
01/06/2004US6674008 Cross substrate, method of mounting semiconductor element, and semiconductor device
01/06/2004US6673757 Process for removing contaminant from a surface and composition useful therefor
01/06/2004US6673726 High-pressure anneal process for integrated circuits
01/06/2004US6673725 Film forming by plasma enhanced vapor deposition using gas of nitrous oxide, water, carbon dioxide, ammonia, an alkylsiloxane and a methylsilane; coating a copper wiring
01/06/2004US6673724 Pulsed-mode RF bias for side-wall coverage improvement
01/06/2004US6673721 Process for removal of photoresist mask used for making vias in low k carbon-doped silicon oxide dielectric material, and for removal of etch residues from formation of vias and removal of photoresist mask
01/06/2004US6673720 Method for improving the reliability of flash memories
01/06/2004US6673719 Method for etching using a multilevel hard mask
01/06/2004US6673718 Methods for forming aluminum metal wirings
01/06/2004US6673717 Methods for fabricating nanopores for single-electron devices
01/06/2004US6673716 Control of the deposition temperature to reduce the via and contact resistance of Ti and TiN deposited using ionized PVD techniques
01/06/2004US6673715 Methods of forming conductive contacts
01/06/2004US6673714 Method of fabricating a sub-lithographic sized via
01/06/2004US6673713 Antireflective coating has etch rate such that it can be removed simultaneously with the cleaning of an opening; for use in photolithography
01/06/2004US6673712 Method of forming dual-implanted gate and structure formed by the same
01/06/2004US6673711 Solder ball fabricating process
01/06/2004US6673710 Method of connecting a conductive trace and an insulative base to a semiconductor chip
01/06/2004US6673708 Thermal and mechanical attachment of a heatspreader to a flip-chip integrated circuit structure using underfill
01/06/2004US6673706 Using developer solution
01/06/2004US6673705 Method of manufacturing a MISFET having post oxide films having at least two kinds of thickness
01/06/2004US6673704 Semiconductor device and method of manufacturing the same
01/06/2004US6673703 Method of fabricating an integrated circuit
01/06/2004US6673702 Method for producing a semiconductor device
01/06/2004US6673699 Apparatus and method for batch processing semiconductor substrates in making semiconductor lasers
01/06/2004US6673698 Thin film semiconductor package utilizing a glass substrate with composite polymer/metal interconnect layers
01/06/2004US6673696 Post trench fill oxidation process for strained silicon processes
01/06/2004US6673695 STI scheme to prevent fox recess during pre-CMP HF dip
01/06/2004US6673693 Method for forming a trench in a semiconductor substrate
01/06/2004US6673689 Double layer electrode and barrier system on hemispherical grain silicon for use with high dielectric constant materials and methods for fabricating the same
01/06/2004US6673688 Method for eliminating collector-base band gap in an HBT
01/06/2004US6673687 Method for fabrication of a heterojunction bipolar transistor
01/06/2004US6673686 Method of forming a gate electrode contact spacer for a vertical DRAM device
01/06/2004US6673685 Method of manufacturing semiconductor devices
01/06/2004US6673684 Use of diamond as a hard mask material
01/06/2004US6673683 Damascene gate electrode method for fabricating field effect transistor (FET) device with ion implanted lightly doped extension regions
01/06/2004US6673682 Methods of fabricating high density mask ROM cells
01/06/2004US6673681 Process for forming MOS-gated power device having segmented trench and extended doping zone
01/06/2004US6673680 Field coupled power MOSFET bus architecture using trench technology
01/06/2004US6673679 Semiconductor device with alternating conductivity type layer and method of manufacturing the same
01/06/2004US6673678 Non-volatile semiconductor memory device and manufacturing method thereof
01/06/2004US6673677 Method for manufacturing a multi-bit memory cell
01/06/2004US6673676 Method of fabricating a flash memory cell
01/06/2004US6673675 Methods of fabricating an MRAM device using chemical mechanical polishing
01/06/2004US6673674 Method of manufacturing a semiconductor device having a T-shaped floating gate
01/06/2004US6673673 Method for manufacturing a semiconductor device having hemispherical grains
01/06/2004US6673672 Semiconductor device and method of manufacturing the same
01/06/2004US6673671 Semiconductor device, and method of manufacturing the same
01/06/2004US6673670 Method of forming a capacitor structure and DRAM circuitry having a capacitor structure including interior areas spaced apart from one another in a non-overlapping relationship
01/06/2004US6673669 Method of reducing oxygen vacancies and DRAM processing method
01/06/2004US6673668 Method of forming capacitor of a semiconductor memory device
01/06/2004US6673667 Method for manufacturing a substantially integral monolithic apparatus including a plurality of semiconductor materials
01/06/2004US6673665 Semiconductor device having increased metal silicide portions and method of forming the semiconductor
01/06/2004US6673664 Method of making a self-aligned ferroelectric memory transistor
01/06/2004US6673663 Methods of forming field effect transistors and related field effect transistor constructions
01/06/2004US6673661 Self-aligned method for forming dual gate thin film transistor (TFT) device
01/06/2004US6673660 Method of manufacturing semiconductor element
01/06/2004US6673659 Semiconductor device and method of producing the same
01/06/2004US6673657 Kill index analysis for automatic defect classification in semiconductor wafers
01/06/2004US6673654 Method of manufacturing semiconductor device using heated conveyance member
01/06/2004US6673652 Underfilling method for a flip-chip packaging process
01/06/2004US6673651 Method of manufacturing semiconductor device including semiconductor elements mounted on base plate
01/06/2004US6673650 Multi chip semiconductor package and method of construction
01/06/2004US6673649 Microelectronic device packages and methods for controlling the disposition of non-conductive materials in such packages
01/06/2004US6673646 Growth of compound semiconductor structures on patterned oxide films and process for fabricating same
01/06/2004US6673645 Method and apparatus for a monolithic integrated mesfet and p-i-n optical receiver
01/06/2004US6673644 Porous gas sensors and method of preparation thereof
01/06/2004US6673641 Contact structure for an electric II/VI semiconductor component and a method for the production of the same
01/06/2004US6673640 Method of manufacturing semiconductor device for evaluation capable of evaluating crystal defect using in-line test by avoiding using preferential etching process
01/06/2004US6673639 Method and system for evaluating polysilicon, and method and system for fabricating thin film transistor