Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
01/2004
01/08/2004WO2004003981A1 Conductive etch stop for etching a sacrificial layer
01/08/2004WO2004003980A2 Interconnect structure and method for forming
01/08/2004WO2004003979A2 Method for the production of a nrom memory cell field
01/08/2004WO2004003978A1 Device for picking ic’s from a wafer
01/08/2004WO2004003977A2 Method of defining the dimensions of circuit elements by using spacer deposition techniques
01/08/2004WO2004003973A2 Ion implantation device and method
01/08/2004WO2004003972A2 Transistor and sensors made from molecular materials with electric dipoles
01/08/2004WO2004003970A2 A semiconductor device and method of fabricating a semiconductor device
01/08/2004WO2004003969A2 Method and system for predicting process performance using material processing tool and sensor data
01/08/2004WO2004003964A2 Discharge radiation source, in particular uv radiation
01/08/2004WO2004003963A2 Plasma processor with electrode simultaneously responsive to plural frequencies
01/08/2004WO2004003962A2 Thermal sprayed yttria-containing coating for plasma reactor
01/08/2004WO2004003938A2 Low dielectric constant films derived by sol-gel processing of a hyperbranched polycarbosilane
01/08/2004WO2004003822A1 Controlling a material processing tool and performance data
01/08/2004WO2004003666A1 Coating forming agent for reducing pattern dimension and method of forming fine pattern therewith
01/08/2004WO2004003664A1 Mask and inspection method therefor and production method for semiconductor device
01/08/2004WO2004003663A2 Apparatus and method for treating a substrate electrochemically while reducing metal corrosion
01/08/2004WO2004003410A1 Sealable surface method and device
01/08/2004WO2004003266A1 POROUS SUBSTRATE AND ITS MANUFACTURING METHOD, AND GaN SEMICONDUCTOR MULTILAYER SUBSTRATE AND ITS MANUFACTURING METHOD
01/08/2004WO2004003256A1 Anisotropic dry etching of cu-containing layers
01/08/2004WO2004003086A1 Electrodepositable dielectric coating compositions to coat a substrate and methods to form dielectric coating
01/08/2004WO2004003066A1 Improved interface adhesive
01/08/2004WO2004003059A1 Organic silicate polymer and insulation film comprising the same
01/08/2004WO2004003035A1 Unsaturated monomers, polymers, chemically amplified resist composition, and process of pattern formation
01/08/2004WO2004002955A2 Photosensitive compositions
01/08/2004WO2004002946A1 Novel alkaline earth metal complexes and use thereof
01/08/2004WO2004002934A1 Dicarboxylic acids for dielectrics with barrier effect against copper diffusion
01/08/2004WO2004002882A1 Device and method for the production of chlorotrifluoride and system for etching semiconductor substrates using said device
01/08/2004WO2004002681A1 Method of judging life and quality of abrasive pad etc, method of conditioning abrasive pad, polishing device, semiconductor device, and method of producing the semiconductor device
01/08/2004WO2004002676A1 Partial-membrane carrier head
01/08/2004WO2003088319A3 Method of etching substrates
01/08/2004WO2003088318A3 Method of fabricating vertical structure leds
01/08/2004WO2003085504A3 Graphical user interface (gui) for a semiconductor processing system
01/08/2004WO2003079366A3 Self-aligned via contact for magnetic memory element
01/08/2004WO2003074995A3 Method of using high yielding spectra scatterometry measurements to control semiconductor manufacturing processes and systems for accomplishing same
01/08/2004WO2003063225A3 Dielectric films for narrow gap-fill applications
01/08/2004WO2003054975A3 Baking oven for photovoltaic devices
01/08/2004WO2003052794A3 Process for formation of a wiring network using a porous interlevel dielectric and related structures
01/08/2004WO2003041169A3 Thermally balanced power transistor
01/08/2004WO2003040709A3 Spot grid array imaging system
01/08/2004WO2003038866A3 Method and device for drying semiconductor wafers
01/08/2004WO2003036709A3 A method of forming a silicon dioxide layer on a curved silicon surface
01/08/2004WO2003033687A3 Lift-off process for a hard etch mask for magnetic memory cells in mram devices
01/08/2004WO2003030225B1 Semiconductor chip with multiple rows of bond pads
01/08/2004WO2003023834A3 Method of manufacturing optical devices and related improvements
01/08/2004WO2003021641A3 Method and apparatus for sensing a wafer in a carrier
01/08/2004WO2003019691A3 Manufacturing of non-volatile resistance variable devices and programmable memory cells
01/08/2004WO2003017325A3 Providing current control over wafer borne semiconductor devices using trenches
01/08/2004WO2003012529A3 Objective, particularly a projection objective for use in semiconductor lithography
01/08/2004WO2003009345A3 Integration of fault detection with run-to-run control
01/08/2004WO2002078071A3 Method of shrinking an integrated circuit gate
01/08/2004WO2002073692A3 Apparatus and method for electrical isolation
01/08/2004WO2002073688A3 Lithography method for forming semiconductor devices on a wafer and apparatus
01/08/2004WO2002071449A3 COMPLEMENTARY ACCUMULATION-MODE JFET INTEGRATED CIRCUIT TOPOLOGY USING WIDE (> 2eV) BANDGAP SEMICONDUCTORS
01/08/2004WO2002056342A3 Copper vias in low-k technology
01/08/2004WO2002054455A3 Variable surface hot plate for improved bake uniformity of substrates
01/08/2004WO2002052630A3 Structural reinforcement of highly porous low k dielectric films by ild posts
01/08/2004WO2002050896A3 Method for fabricating vertical transistor rench capacitor dram cells
01/08/2004WO2002050893A3 Process for monitoring a process, planarizing a surface, and for quantifying the results of a planarization process
01/08/2004WO2002045130A3 Embedded vertical dram cells and dual workfunction logic gates
01/08/2004WO2002042845A3 Photoacid generators and photoresists comprising same
01/08/2004WO2002041397A3 Low profile integrated module interconnects
01/08/2004WO2002041369A3 Electropolishing and chemical mechanical planarization
01/08/2004WO2002037542A3 Method for trench capacitor dram cell without floating-well effects
01/08/2004US20040006758 Corrected mask pattern verification apparatus and corrected mask pattern verification
01/08/2004US20040006757 Method and apparatus for defining mask patterns utilizing a spatial frequency doubling technique
01/08/2004US20040006755 System and method to improve IC fabrication through selective fusing
01/08/2004US20040006754 Semiconductor integrated circuit device and layout method of patterns for semiconductor integrated circuit device
01/08/2004US20040006443 Position measuring device and method for determining a position
01/08/2004US20040006404 Permanent chip ID using FeRAM
01/08/2004US20040006191 Silicon-containing polymer, resist composition and patterning process
01/08/2004US20040006189 For use in fine patterning of semiconductors
01/08/2004US20040006150 Photocurable adhesive compositions, reaction products of which have low halide ion content
01/08/2004US20040005845 Polishing method and apparatus
01/08/2004US20040005820 Advanced microelectronic connector assembly and method of manufacturing
01/08/2004US20040005792 Multicontact electric connector
01/08/2004US20040005789 Method for fabricating semiconductor device
01/08/2004US20040005788 Method of forming a silicon nitride dielectric layer
01/08/2004US20040005787 Method to reduce residual particulate contamination in CVD and PVD semiconductor wafer manufacturing
01/08/2004US20040005786 Method for forming a self-aligned contact hole in a semiconductor device
01/08/2004US20040005785 Atmospheric process and system for controlled and rapid removal of polymers from high depth to width aspect ratio holes
01/08/2004US20040005784 Method for reducing a low volatility byproduct from a wafer surface following an etching process
01/08/2004US20040005783 Method of reworking tungsten particle contaminated semiconductor wafers
01/08/2004US20040005782 Method for demascene reworking
01/08/2004US20040005781 HDP SRO liner for beyond 0.18 um STI gap-fill
01/08/2004US20040005780 Method of boosting wafer cleaning efficiency and increasing process yield
01/08/2004US20040005778 Method for structuring a silicon layer
01/08/2004US20040005777 High resistivity and high gettering ability; DZ-IG wafer that can serve as an alternative of SOI wafer for mobile communications
01/08/2004US20040005775 Method for depositing an adhesion/barrier layer to improve adhesion and contact resistance
01/08/2004US20040005774 Method of manufacturing semiconductor device and semiconductor device
01/08/2004US20040005773 Method of using ternary copper alloy to obtain a low resistance and large grain size interconnect
01/08/2004US20040005771 Bumping process to increase bump height and to create a more robust bump structure
01/08/2004US20040005770 Semiconductor devices with permanent polymer stencil and method for manufacturing the same
01/08/2004US20040005769 Method and apparatus for endpoint detection
01/08/2004US20040005767 Method of forming an isolation layer in a semiconductor devices
01/08/2004US20040005766 Method of forming a bottom oxide layer in a trench
01/08/2004US20040005765 Fabrication method for shallow trench isolation
01/08/2004US20040005764 Ion implant method for topographic feature corner rounding
01/08/2004US20040005763 Method of manufacturing low-leakage, high-performance device
01/08/2004US20040005762 Vertical transistor, and a method for producing a vertical transistor