| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 01/21/2004 | CN1135200C Wafer container with door |
| 01/21/2004 | CN1135145C Piezoelectric sensor for measuring welding parameter |
| 01/20/2004 | US6681376 Integrated scheme for semiconductor device verification |
| 01/20/2004 | US6681361 Semiconductor device inspection apparatus and semiconductor device inspection method |
| 01/20/2004 | US6681193 Method for testing a CMOS integrated circuit |
| 01/20/2004 | US6681148 Monitoring system for a conveying device for flat articles, especially wafers |
| 01/20/2004 | US6680875 Semiconductor device, such as a synchronous DRAM, including a control circuit for reducing power consumption |
| 01/20/2004 | US6680873 Semiconductor device having electric fuse element |
| 01/20/2004 | US6680864 Method for reading a vertical gain cell and array for a dynamic random access memory |
| 01/20/2004 | US6680862 Memory device having wide margin of data reading operation, for storing data by change in electric resistance value |
| 01/20/2004 | US6680859 Semiconductor integrated circuit, transistor, gate oxide, cell plate of polysilicon and metal conductor with dieletric between |
| 01/20/2004 | US6680798 Optical reduction system with control of illumination polarization |
| 01/20/2004 | US6680794 Polarization beam splitter for photolithography |
| 01/20/2004 | US6680775 Substrate treating device and method, and exposure device and method |
| 01/20/2004 | US6680774 Method and apparatus for mechanically masking a workpiece |
| 01/20/2004 | US6680646 Power integrated circuit with distributed gate driver |
| 01/20/2004 | US6680577 EL display device and electronic apparatus |
| 01/20/2004 | US6680545 Semiconductor devices |
| 01/20/2004 | US6680542 Damascene structure having a metal-oxide-metal capacitor associated therewith |
| 01/20/2004 | US6680541 Having intermetal insulating film of organic siloxane type with low dielectric constant, high selectivity against resist etching, and causing no problem of delamination without using silicon oxide protective film |
| 01/20/2004 | US6680540 Multiple layers of copper wires in insulation film covered by protective film and surrounded by barrier film, in which at least one film is cobalt-boron alloy containing chromium, molybdenum, tungsten, rhenium, thallium and/or phosphorus |
| 01/20/2004 | US6680539 Semiconductor device, semiconductor device pattern designing method, and semiconductor device pattern designing apparatus |
| 01/20/2004 | US6680538 Semiconductor device for suppressing detachment of conductive layer |
| 01/20/2004 | US6680537 Semiconductor device having a dual damascene interconnect structure and method for manufacturing same |
| 01/20/2004 | US6680536 Probe unit having resilient metal leads |
| 01/20/2004 | US6680535 Semiconductor device, manufacturing method for semiconductor device and mounting method for the same |
| 01/20/2004 | US6680533 Semiconductor device with suppressed RF interference |
| 01/20/2004 | US6680531 Multi-chip semiconductor package |
| 01/20/2004 | US6680529 Semiconductor build-up package |
| 01/20/2004 | US6680524 Semiconductor device and method for fabricating the same |
| 01/20/2004 | US6680523 Semiconductor wafer with process control modules |
| 01/20/2004 | US6680522 Semiconductor device with reduced electrical variation |
| 01/20/2004 | US6680521 High density composite MIM capacitor with reduced voltage dependence in semiconductor dies |
| 01/20/2004 | US6680520 Method and structure for forming precision MIM fusible circuit elements using fuses and antifuses |
| 01/20/2004 | US6680518 Silicon substrate supporting field effect transistor and two inductors, one connected to gate of transistor configured to sample output of first inductor and other connected to source configured to drive second inductor, increasing inductance |
| 01/20/2004 | US6680516 Structure comprising semiconductor substrate, gate layer, metallic layer, and etch-stop layer; distance between substrate and top of etch-stop layer is gate stack height, which is at most 2700 angstroms |
| 01/20/2004 | US6680515 Lateral high voltage transistor having spiral field plate and graded concentration doping |
| 01/20/2004 | US6680514 Contact capping local interconnect |
| 01/20/2004 | US6680512 Semiconductor device having an integral protection circuit |
| 01/20/2004 | US6680511 Integrated circuit devices providing improved short prevention |
| 01/20/2004 | US6680510 Non-volatile memory device having a cell transistor and a non-cell transistor |
| 01/20/2004 | US6680509 Nitride barrier layer for protection of ONO structure from top oxide loss in fabrication of SONOS flash memory |
| 01/20/2004 | US6680508 Vertical floating gate transistor |
| 01/20/2004 | US6680507 Dual bit isolation scheme for flash memory devices having polysilicon floating gates |
| 01/20/2004 | US6680506 Method for forming a flash memory cell having contoured floating gate surface |
| 01/20/2004 | US6680505 Semiconductor storage element |
| 01/20/2004 | US6680504 Method for constructing a metal oxide semiconductor field effect transistor |
| 01/20/2004 | US6680502 Buried digit spacer separated capacitor array |
| 01/20/2004 | US6680501 Semiconductor device |
| 01/20/2004 | US6680500 Insulating cap layer and conductive cap layer for semiconductor devices with magnetic material layers |
| 01/20/2004 | US6680499 Semiconductor device and method of manufacturing the same |
| 01/20/2004 | US6680497 Interstitial diffusion barrier |
| 01/20/2004 | US6680495 Silicon wafer with embedded optoelectronic material for monolithic OEIC |
| 01/20/2004 | US6680494 Ultra high speed heterojunction bipolar transistor having a cantilevered base |
| 01/20/2004 | US6680489 Assembly comprising window having on surface optically transparent thin film of amorphous silicon carbide having specified resistivity |
| 01/20/2004 | US6680488 Semiconductor device |
| 01/20/2004 | US6680487 Semiconductor comprising a TFT provided on a substrate having an insulating surface and method of fabricating the same |
| 01/20/2004 | US6680486 Insulated gate field effect transistor and its manufacturing method |
| 01/20/2004 | US6680485 Thin film transistors on plastic substrates |
| 01/20/2004 | US6680481 Mark-detection methods and charged-particle-beam microlithography methods and apparatus comprising same |
| 01/20/2004 | US6680473 Atomic beam control apparatus and method |
| 01/20/2004 | US6680462 Heat treating method and heat treating apparatus |
| 01/20/2004 | US6680460 Apparatus for producing a semiconductor thin film |
| 01/20/2004 | US6680455 Plasma resistant quartz glass jig |
| 01/20/2004 | US6680436 Reflow encapsulant |
| 01/20/2004 | US6680435 Electronic device and method of fabricating the same |
| 01/20/2004 | US6680420 It uses radio frequency to excite the constituents of particle exhausted into plasma state such that the constituent reacts to form gaseous products that may be pumped through the vacuum line |
| 01/20/2004 | US6680262 Method of making a semiconductor device by converting a hydrophobic surface of a dielectric layer to a hydrophilic surface |
| 01/20/2004 | US6680261 Method of reducing boron outgassing at trench power IC's oxidation process for sacrificial oxide layer |
| 01/20/2004 | US6680260 Method of producing a bonded wafer and the bonded wafer |
| 01/20/2004 | US6680259 Dual layer etch stop barrier |
| 01/20/2004 | US6680258 Method of forming an opening through an insulating layer of a semiconductor device |
| 01/20/2004 | US6680257 Alternative related to SAS in flash EEPROM |
| 01/20/2004 | US6680256 Process for planarization of flash memory cell |
| 01/20/2004 | US6680255 Plasma etching methods |
| 01/20/2004 | US6680254 Method of fabricating bit line and bit line contact plug of a memory cell |
| 01/20/2004 | US6680253 Apparatus for processing a workpiece |
| 01/20/2004 | US6680252 Low temperature, high temperature, baking, crosslinking; antireflectivity coating |
| 01/20/2004 | US6680251 Depositing seeding layer of ruthenium oxide at a chemical vapor deposition (cvd) flow rate ratio of a ruthenium source to oxygen gas, then increasing the cvd flow rate of the precursors to deposit ruthenium |
| 01/20/2004 | US6680250 Formation of deep amorphous region to separate junction from end-of-range defects |
| 01/20/2004 | US6680249 Si-rich surface layer capped diffusion barriers |
| 01/20/2004 | US6680248 Method of forming dual damascene structure |
| 01/20/2004 | US6680247 Manufacturing method of a semiconductor device |
| 01/20/2004 | US6680246 Process for forming a nitride film |
| 01/20/2004 | US6680244 Method for manufacturing semiconductor device |
| 01/20/2004 | US6680243 Shallow junction formation |
| 01/20/2004 | US6680242 Method of forming crystalline semiconductor thin film on base substrate, lamination formed with crystalline semiconductor thin film and color filter |
| 01/20/2004 | US6680241 Method of manufacturing semiconductor devices by dividing wafer into chips and such semiconductor devices |
| 01/20/2004 | US6680240 Silicon-on-insulator device with strained device film and method for making the same with partial replacement of isolation oxide |
| 01/20/2004 | US6680239 Effective isolation with high aspect ratio shallow trench isolation and oxygen or field implant |
| 01/20/2004 | US6680238 Method for manufacturing a semiconductor device |
| 01/20/2004 | US6680237 Method of manufacturing deep trench capacitor |
| 01/20/2004 | US6680236 Ion-implantation and shallow etching to produce effective edge termination in high-voltage heterojunction bipolar transistors |
| 01/20/2004 | US6680235 Method for fabricating a selective eptaxial HBT emitter |
| 01/20/2004 | US6680234 Semiconductor device having the effect that the drop in the current gain is kept to the minimum, when the substrate density is amplified and that the variation in the collector current is improved |
| 01/20/2004 | US6680233 Semiconductor device formed with disposable spacer and liner using high-K material and method of fabrication |
| 01/20/2004 | US6680232 Covering the device layer with an etch resistant masking layer to define trench regions; removing semiconductor material from the exposed trench regions by applying an etching agent; exposing the sidewalls to a passivating agent |
| 01/20/2004 | US6680231 High-voltage device process compatible with low-voltage device process |
| 01/20/2004 | US6680230 Semiconductor device and method of fabricating the same |
| 01/20/2004 | US6680229 Method for enhancing vertical growth during the selective formation of silicon, and structures formed using same |