| Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368) |
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| 10/19/2006 | DE19727424B4 Eingabepuffer für ein Halbleiterspeicherbauelement Input buffer for a semiconductor memory device |
| 10/19/2006 | DE112004001743T5 Speicherbauelement mit Mehrarraystruktur für eine erhöhte Bandbreite Memory device with multi-array structure for a higher bandwidth |
| 10/18/2006 | EP1057186B1 A memory decoder with zero static power |
| 10/18/2006 | CN1280832C Semiconductor memory and control method |
| 10/18/2006 | CN1280827C Voltage boost level clamping circuit and voltage increasing circuit for flash memory, EMS memory, and method for increasing clamping voltage in EMS memory |
| 10/17/2006 | US7124348 Data storage method with error correction |
| 10/17/2006 | US7123542 Memory having internal column counter for compression test mode |
| 10/17/2006 | US7123541 Memory with address management |
| 10/17/2006 | US7123540 Semiconductor device having delay-locked loop and test method thereof |
| 10/17/2006 | US7123539 Memory modules with magnetoresistive elements and method of reading data from row or column directions |
| 10/17/2006 | US7123538 Semiconductor memory device for improving access time in burst mode |
| 10/17/2006 | US7123537 Decoder arrangement of a memory cell array |
| 10/17/2006 | US7123528 Flash memory device having column predecoder capable of selecting all column selection transistors and stress test method thereof |
| 10/17/2006 | US7123525 Phase detector for all-digital phase locked and delay locked loops |
| 10/17/2006 | US7123501 Semiconductor memory device using ferroelectric capacitor, and semiconductor device with the same |
| 10/12/2006 | US20060227651 Column Path Circuit |
| 10/12/2006 | US20060227650 Semiconductor integrated circuit |
| 10/12/2006 | US20060227649 Dual port memory cell with reduced coupling capacitance and small cell size |
| 10/12/2006 | US20060227648 Semiconductor memory device |
| 10/12/2006 | US20060227647 Multi-port memory device |
| 10/12/2006 | US20060227646 Integrated circuit memory device, system and method having interleaved row and column control |
| 10/12/2006 | US20060227612 Common wordline flash array architecture |
| 10/12/2006 | US20060227593 Low voltage operation dram control circuits |
| 10/12/2006 | DE102006003583A1 Spaltenpfadschaltung Column path circuit |
| 10/11/2006 | EP1710804A2 Line layout structure, semiconductor memory device, and layout method |
| 10/11/2006 | CN1846273A 循环器链存储器命令和地址总线拓扑 Loop chain memory command and address bus topology |
| 10/11/2006 | CN1845329A Layout structure in semiconductor memory device and layout method therefor |
| 10/11/2006 | CN1279617C Semiconductor memory device |
| 10/11/2006 | CN1279432C Storage and reproduction apparatus |
| 10/10/2006 | US7120761 Multi-port memory based on DRAM core |
| 10/10/2006 | US7120085 Pseudo SRAM having combined synchronous and asynchronous mode register set |
| 10/10/2006 | US7120084 Integrated memory controller |
| 10/10/2006 | US7120083 Structure and method for transferring column address |
| 10/10/2006 | US7120082 System for reducing row periphery power consumption in memory devices |
| 10/10/2006 | US7120081 Multi-port memory device with stacked banks |
| 10/10/2006 | US7120080 Dual port semiconductor memory device |
| 10/10/2006 | US7120079 Flash/dynamic random access memory field programmable gate array |
| 10/10/2006 | US7120077 Memory module having a plurality of integrated memory components |
| 10/10/2006 | US7120074 Semiconductor memory and method for operating a semiconductor memory |
| 10/10/2006 | US7120071 Test method for a semiconductor memory |
| 10/10/2006 | US7120066 Memory device for multiplexing input and output operation |
| 10/10/2006 | US7120061 Method and apparatus for a dual power supply to embedded non-volatile memory |
| 10/10/2006 | US7120042 Ferroelectric memory device having test memory cell |
| 10/05/2006 | WO2006105453A2 Integrated circuit memory array configuration including decoding compatibility with partial implementation of multiple memory layers |
| 10/05/2006 | WO2005091890A3 Method and apparatus for security in a wireless network |
| 10/05/2006 | US20060221761 Control unit for deactivating and activating the control signals |
| 10/05/2006 | US20060221760 Method and apparatus for using counter-mode encryption to protect image data in frame buffer of a video compression system |
| 10/05/2006 | US20060221759 Circuit and method for operating a delay-lock loop in a power saving manner |
| 10/05/2006 | US20060221758 Transistor layout configuration for tight-pitched memory array lines |
| 10/05/2006 | US20060221757 Multi-port memory device |
| 10/05/2006 | US20060221756 Semiconductor device with non-volatile memory and random access memory |
| 10/05/2006 | US20060221755 Semiconductor storage device |
| 10/05/2006 | US20060221754 Semiconductor memory device |
| 10/05/2006 | US20060221753 Memory chip architecture with high speed operation |
| 10/05/2006 | US20060221752 Integrated circuit memory array configuration including decoding compatibility with partial implementation of multiple memory layers |
| 10/05/2006 | DE102005015002A1 Automatic repair method for integrated memory circuit using repair position data and fuses of integrated memory circuit, involves programming identified fuses using generated repair position data to repair integrated memory circuit |
| 10/05/2006 | DE10037706B4 Schaltung zum Betreiben eines nichtflüchtigen ferroelektrischen Speichers Circuit for operating a nonvolatile ferroelectric memory |
| 10/04/2006 | CN1842875A Semiconductor memory component and method for operating said component |
| 10/04/2006 | CN1842872A Method and system for controlling write current in magnetic memory |
| 10/04/2006 | CN1841750A 半导体存储装置 The semiconductor memory device |
| 10/04/2006 | CN1841748A Three-dimensional memory devices and methods of manufacturing and operating the same |
| 10/03/2006 | US7117401 Method and apparatus for optimizing timing for a multi-drop bus |
| 10/03/2006 | US7117291 Memory with synchronous bank architecture |
| 10/03/2006 | US7116605 Dual port SRAM cell |
| 10/03/2006 | US7116604 Semiconductor memory device and method for selecting multiple word lines in a semiconductor memory device |
| 10/03/2006 | US7116591 Redundancy circuits and memory devices having a twist bitline scheme and methods of repairing defective cells in the same |
| 10/03/2006 | US7116590 Memory address repair without enable fuses |
| 10/03/2006 | US7116586 Non-volatile semiconductor memory device and semiconductor disk device |
| 10/03/2006 | US7116578 Non-volatile memory device and data storing method |
| 10/03/2006 | US7116146 Digital DLL device, digital DLL control method, and digital DLL control program |
| 10/03/2006 | US7116132 Current feedback amplifiers with separate common-mode and differential-mode inputs |
| 10/03/2006 | US7115901 Non-volatile electromechanical field effect devices and circuits using same and methods of forming same |
| 09/28/2006 | WO2006100625A1 Processing a data array with a meandering scanning order using a circular buffer memory |
| 09/28/2006 | US20060215481 System and method for re-ordering memory references for access to memory |
| 09/28/2006 | US20060215480 Semiconductor memory device and core layout thereof |
| 09/28/2006 | US20060215479 Bitline driving circuit in semiconductor memory device and driving method thereof |
| 09/28/2006 | US20060215478 Semiconductor memory |
| 09/28/2006 | US20060215477 Semiconductor device and method of controlling said semiconductor device |
| 09/28/2006 | US20060215476 Manipulable interactive devices |
| 09/28/2006 | US20060215458 Nonvolatile semiconductor memory |
| 09/28/2006 | DE10317279B4 Verzögerungsschaltung Delay circuit |
| 09/28/2006 | DE10242886B4 Interpolationsschaltung, DLL-Schaltung und integrierte Halbleiterschaltung Interpolation circuit, the DLL circuit and semiconductor integrated circuit |
| 09/27/2006 | CN1839545A Circuit for testing and fine tuning integrated circuit (switch control circuit) |
| 09/27/2006 | CN1838311A Memory device for serial transmission interface and error correction method thereof |
| 09/27/2006 | CN1277313C Semiconductor memory device |
| 09/26/2006 | US7114023 Non-sequential access pattern based address generator |
| 09/26/2006 | US7113507 Method and system for communicating control information via out-of-band symbols |
| 09/26/2006 | US7113446 Latch circuit and synchronous memory including the same |
| 09/26/2006 | US7113445 Multi-port memory cell and access method |
| 09/26/2006 | US7113443 Method of address distribution time reduction for high speed memory macro |
| 09/26/2006 | US7113432 Compressed event counting technique and application to a flash memory system |
| 09/26/2006 | US7113430 Device for reducing sub-threshold leakage current within a high voltage driver |
| 09/26/2006 | US7113419 Ferroelectric memory device and method of reading a ferroelectric memory |
| 09/26/2006 | US7113027 Semiconductor integrated circuit device |
| 09/26/2006 | US7112493 Method of making non-volatile field effect devices and arrays of same |
| 09/21/2006 | US20060209620 Synchronous clock generator including duty cycle correction |
| 09/21/2006 | US20060209619 Data input circuit of synchronous semiconductor memory device using data sampling method for changing DQS domain to clock domain |
| 09/21/2006 | US20060209618 Efficient register for additive latency in DDR2 mode of operation |
| 09/21/2006 | US20060209617 Simulating a floating wordline condition in a memory device, and related techniques |
| 09/21/2006 | US20060209616 Phase change memory device and associated wordline driving circuit |