| Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368) |
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| 05/09/2006 | US7042769 Semiconductor memory device capable of accurate and stable operation |
| 05/09/2006 | US7042266 Delay circuit and method |
| 05/09/2006 | US7042251 Multi-function differential logic gate |
| 05/09/2006 | US7042246 Logic circuits for performing threshold functions |
| 05/09/2006 | US7042002 Quantum memory and information processing method using the same |
| 05/09/2006 | CA2420378C Non-volatile passive matrix and method for readout of the same |
| 05/04/2006 | US20060092755 Semiconductor test apparatus and control method therefor |
| 05/04/2006 | US20060092754 Semiconductor memory device with reduced number of pads |
| 05/04/2006 | US20060092753 Semiconductor device and testing method for semiconductor device |
| 05/04/2006 | US20060092752 Multiple chip package and IC chips |
| 05/04/2006 | US20060092751 Peripheral management |
| 05/04/2006 | US20060092750 Line driver circuit for a semiconductor memory device |
| 05/04/2006 | US20060092749 Bitline layout in a dual port memory array |
| 05/04/2006 | US20060092748 Semiconductor memory |
| 05/04/2006 | US20060092747 Memory bank structure |
| 05/04/2006 | US20060092680 Semiconductor memory device |
| 05/04/2006 | DE102005001038B3 Non volatile memory`s e.g. flash memory, block management method for e.g. computer system, involves assigning physical memory block number of real memory block number on table, and addressing real memory blocks with physical block number |
| 05/04/2006 | DE102004051936A1 Verfahren und Vorrichtung zur Erhöhung der Verfügbarkeit für eine Speichereinheit und Speichereinheit Method and apparatus for increasing the availability for a memory unit and memory unit |
| 05/03/2006 | EP1653374A2 Method and apparatus for coordinating memory operations among diversely-located memory components |
| 05/03/2006 | EP1652190A1 Hub component for connection to one or more memory modules |
| 05/02/2006 | US7039121 Method and system for transition-controlled selective block inversion communications |
| 05/02/2006 | US7038972 Double data rate synchronous dynamic random access memory semiconductor device |
| 05/02/2006 | US7038971 Multi-clock domain data input-processing device having clock-receiving locked loop and clock signal input method thereof |
| 05/02/2006 | US7038965 Pointer generator for stack |
| 05/02/2006 | US7038952 Block RAM with embedded FIFO buffer |
| 05/02/2006 | US7038940 Pulsed write techniques for magneto-resistive memories |
| 05/02/2006 | US7038937 Dynamic memory word line driver scheme |
| 05/02/2006 | US7038926 Multi-port static random access memory |
| 04/27/2006 | WO2006044942A2 Method and system for providing sensing circuitry in a multi-bank memory device |
| 04/27/2006 | WO2005096796A3 Method and apparatus for a dual power supply to embedded non-volatile memory |
| 04/27/2006 | US20060087909 Semiconductor integrated circuit device |
| 04/27/2006 | US20060087908 Delay stage-interweaved analog DLL/PLL |
| 04/27/2006 | US20060087907 Delay stage-interweaved analog DLL/PLL |
| 04/27/2006 | US20060087906 Simulating a floating wordline condition in a memory device, and related techniques |
| 04/27/2006 | DE20221512U1 Memory system for data processor, has differential signaling data bus with symbol time lesser than specific address and control bus symbol time |
| 04/27/2006 | DE19921258B4 Ansteuerschaltung für einen nichtflüchtigen ferroelektrischen Speicher A drive circuit for a non-volatile ferroelectric memory |
| 04/27/2006 | DE10394263T5 Verfahren zur Herstellung von Mehrebenenkontakten durch Dimensionierung von Kontaktgrössen in integrierten Schaltungen A process for producing multi-level contacts by dimensioning of contact sizes in integrated circuits |
| 04/26/2006 | EP1650766A1 Method for erasing a flash memory and counter comprising a flash memory |
| 04/26/2006 | CN1253894C Method for realizing two first-in first-out queue using one double-port RAM |
| 04/25/2006 | US7035985 Method and apparatus for accessing a memory core multiple times in a single clock cycle |
| 04/25/2006 | US7035164 Semiconductor memory device with a bypass circuit for verifying the characteristics of an internal clock signal |
| 04/25/2006 | US7035163 Asynchronously-resettable decoder with redundancy |
| 04/25/2006 | US7035162 Memory devices including global row decoders and operating methods thereof |
| 04/25/2006 | US7035161 Semiconductor integrated circuit |
| 04/25/2006 | US7035156 Semiconductor memory device control method thereof, and control method of semiconductor device |
| 04/25/2006 | US7035155 Dynamic memory management |
| 04/25/2006 | US7035151 Array architecture and operating methods for digital multilevel nonvolatile memory integrated circuit system |
| 04/25/2006 | US7035143 NAND flash memory device and method of reading the same |
| 04/25/2006 | US7035135 Semiconductor memory device |
| 04/25/2006 | US7035132 Memory architecture for increased speed and reduced power consumption |
| 04/20/2006 | WO2006040633A1 Semiconductor memory device with mos transistors each having floating gate and control gate |
| 04/20/2006 | US20060083103 Buffered continuous multi-drop clock ring |
| 04/20/2006 | US20060083102 Failover control of dual controllers in a redundant data storage system |
| 04/20/2006 | US20060083101 Method of address distribution time reduction for high speed memory macro |
| 04/20/2006 | US20060083100 Integrated semiconductor memory and method for operating an integrated semiconductor memory |
| 04/20/2006 | US20060083099 System and method for redundancy memory decoding |
| 04/20/2006 | US20060083098 Electronic memory with binary storage elements |
| 04/20/2006 | US20060083097 Method and system for providing sensing circuitry in a multi-bank memory device |
| 04/20/2006 | US20060083096 Semiconductor memory device and package thereof, and memory card using the same |
| 04/20/2006 | US20060083083 Method and apparatus for synchronization of row and column access operations |
| 04/20/2006 | US20060081971 Signal transfer methods for integrated circuits |
| 04/20/2006 | DE102004048699A1 Integrierter Halbleiterspeicher und Verfahren zum Betreiben eines integrierten Halbleiterspeichers Integrated semiconductor memory and method of operating an integrated semiconductor memory, |
| 04/19/2006 | EP1647027A1 Programmable chip select |
| 04/19/2006 | CN1252822C Semiconductor memory |
| 04/19/2006 | CN1252725C Recording medium, equipment, method, compiling equipment and method |
| 04/18/2006 | US7032084 Circuit for generating column selection control signal in memory device |
| 04/18/2006 | US7031222 DQS postamble filtering |
| 04/18/2006 | US7031221 Fixed phase clock and strobe signals in daisy chained chips |
| 04/18/2006 | US7031220 Semiconductor memory device and semiconductor integrated circuit device |
| 04/18/2006 | US7031218 Externally clocked electrical fuse programming with asynchronous fuse selection |
| 04/18/2006 | US7031216 Refresh controller with low peak current |
| 04/18/2006 | US7031202 Method and apparatus for rapidly storing data in memory cell without voltage loss |
| 04/18/2006 | US7031194 Nonvolatile semiconductor memory and method for controlling the same |
| 04/18/2006 | US7031185 Data storage device and method of forming the same |
| 04/18/2006 | US7031179 Bit cell array for preventing coupling effect in read only memory |
| 04/18/2006 | US7030438 Semiconductor integrated circuit |
| 04/13/2006 | WO2006039106A1 Multi-column addressing mode memory system including an intergrated circuit memory device |
| 04/13/2006 | WO2005111822A3 Method and device for managing a bus |
| 04/13/2006 | US20060077752 Phase controlled high speed interfaces |
| 04/13/2006 | US20060077751 Latency control circuit and method of latency control |
| 04/13/2006 | US20060077750 System and method for error detection in a redundant memory system |
| 04/13/2006 | US20060077749 Memory card structure and manufacturing method thereof |
| 04/13/2006 | US20060077748 Address buffer circuit and method for controlling the same |
| 04/13/2006 | US20060077747 Semiconductor device and data reading method |
| 04/13/2006 | US20060077746 Column decoding architecture for flash memories |
| 04/13/2006 | DE102004060348A1 Halbleiterspeichervorrichtung und Gehäuse dazu, und Speicherkarte mit Verwendung derselben Semiconductor memory device and housing to and memory card using the same |
| 04/13/2006 | DE102004047764A1 Speicheranordnung, Verfahren zum Betrieb und Verwendung einer solchen Memory device, methods of operation and use of such |
| 04/13/2006 | DE102004047610A1 Integrierte Speicher-Schaltungsanordnung mit Ansteuerschaltung und Verwendungen Integrated memory circuit arrangement with a control circuit and uses |
| 04/12/2006 | CN1759449A Multi-frequency synchronizing clock signal generator |
| 04/12/2006 | CN1759448A Low-voltage sense amplifier and method |
| 04/12/2006 | CN1758370A Row decoder circuit for use in non-volatile memory device |
| 04/12/2006 | CN1758216A Balance position cell design of multiport scratch memory |
| 04/12/2006 | CN1251241C Semiconductor memory |
| 04/11/2006 | US7028208 Duty cycle distortion compensation for the data output of a memory device |
| 04/11/2006 | US7027551 Shift register |
| 04/11/2006 | US7027550 Shift register unit and signal driving circuit using the same |
| 04/11/2006 | US7027352 Delay locked loop (DLL) in semiconductor device |
| 04/11/2006 | US7027351 Negative word line driver |
| 04/11/2006 | US7027349 Method for selecting memory device in response to bank selection signal |
| 04/11/2006 | US7027348 Power efficient read circuit for a serial output memory device and method |