| Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368) |
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| 08/31/2006 | US20060195713 Duty cycle distortion compensation for the data output of a memory device |
| 08/31/2006 | US20060193196 Semiconductor memory device having a precharge control circuit and an associated precharge method |
| 08/31/2006 | US20060193195 Apparatus and method for controlling clock signal in semiconductor memory device |
| 08/31/2006 | US20060193194 Data strobe synchronization for DRAM devices |
| 08/31/2006 | US20060193193 High speed data bus |
| 08/31/2006 | US20060193192 Method for identifying memory bit cells and connections |
| 08/31/2006 | US20060193191 Contactless bidirectional nonvolatile memory |
| 08/31/2006 | US20060193190 Multi-bank memory |
| 08/31/2006 | US20060193178 Non-volatile memory device with erase address register |
| 08/30/2006 | EP1695356A2 Nand memory array incorporating multiple series selection devices and method for operation of same |
| 08/30/2006 | EP1642297A4 Data strobe synchronization circuit and method for double data rate, multi-bit writes |
| 08/30/2006 | CN1826657A 可编程的芯片选择 Programmable chip select |
| 08/30/2006 | CN1825474A Random access memory having fast column access |
| 08/30/2006 | CN1825473A Access control device, method for changing memory addresses, and memory system |
| 08/29/2006 | US7099234 Low power sleep mode operation technique for dynamic random access memory (DRAM) devices and integrated circuit devices incorporating embedded DRAM |
| 08/29/2006 | US7099233 Parallel asynchronous propagation pipeline structure and methods to access multiple memory arrays |
| 08/29/2006 | US7099232 Delay locked loop device |
| 08/29/2006 | US7099231 Interleaving memory blocks to relieve timing bottleneck in a multi-queue first-in first-out memory system |
| 08/29/2006 | US7099230 Virtual ground circuit for reducing SRAM standby power |
| 08/29/2006 | US7099229 Nonvolatile memory device having circuit for stably supplying desired current during data writing |
| 08/29/2006 | US7099228 Semiconductor memory device |
| 08/29/2006 | US7099226 Functional register decoding system for multiple plane operation |
| 08/29/2006 | US7099225 Semiconductor memory device with reduced leak current |
| 08/29/2006 | US7099219 Multi read port bit line |
| 08/29/2006 | US7099211 Flash memory device capable of reducing test time and test method thereof |
| 08/29/2006 | US7099208 Semiconductor memory automatically carrying out refresh operation |
| 08/29/2006 | US7099193 Nonvolatile semiconductor memory device, electronic card and electronic apparatus |
| 08/29/2006 | US7099179 Conductive memory array having page mode and burst mode write capability |
| 08/29/2006 | US7098712 Register controlled delay locked loop with reduced delay locking time |
| 08/24/2006 | US20060190674 Hub chip for connecting one or more memory chips |
| 08/24/2006 | US20060190638 Asynchronous jitter reduction technique |
| 08/24/2006 | US20060187742 Nonvolatile ferroelectric memory and control device using the same |
| 08/24/2006 | US20060187741 Method and apparatus for avoiding bi-directional signal fighting of serial interface |
| 08/24/2006 | US20060187740 System and method for mode register control of data bus operating mode and impedance |
| 08/24/2006 | US20060187739 Methods and apparatus for using memory |
| 08/24/2006 | US20060187738 Memory management device and memory device |
| 08/24/2006 | US20060187737 Pattern layout of word line transfer transistors in NAND flash memory which executes subblock erase |
| 08/24/2006 | US20060187736 Non-volatile memory device conducting comparison operation |
| 08/24/2006 | US20060187735 Indexation by transposition of matrix of large dimension |
| 08/24/2006 | DE102004047610B4 Integrierte Speicher-Schaltungsanordnung mit Tunnel-Feldeffekttransistor als Ansteuertransistor Integrated memory circuit arrangement with tunnel field effect transistor as a driving transistor |
| 08/23/2006 | EP1693759A2 Flash memory architecture implementing simultaneously programmable multiple flash memory banks that are host compatible |
| 08/23/2006 | CN1822217A Apparatus and method for storing data in nonvolatile cache memory considering update ratio |
| 08/23/2006 | CN1822213A Semiconductor memory device |
| 08/23/2006 | CN1271636C Multiport memory based on dynamic random access memory core |
| 08/23/2006 | CN1271533C Apparatus for implementing buffered daisy-chain connection between memory controller and memory modules |
| 08/22/2006 | US7096137 Clock trim mechanism for onboard system clock |
| 08/22/2006 | US7095674 Modular register array |
| 08/22/2006 | US7095673 Semiconductor memory device capable of operating at high speed |
| 08/22/2006 | US7095672 Semiconductor memory device and method of controlling the same |
| 08/22/2006 | US7095662 Semiconductor memory device having first and second memory cell arrays and a program method thereof |
| 08/22/2006 | US7095661 Semiconductor memory module, memory system, circuit, semiconductor device, and DIMM |
| 08/22/2006 | US7095653 Common wordline flash array architecture |
| 08/22/2006 | US7095648 Magnetoresistive memory cell array and MRAM memory comprising such array |
| 08/17/2006 | WO2004071065A3 Apparatus and method for accommodating loss of signal |
| 08/17/2006 | US20060184863 Memory device for use in high-speed block pipelined reed-solomon decoder, method of accessing the memory device, and reed-solomon decoder having the memory device |
| 08/17/2006 | US20060181957 Register read for volatile memory |
| 08/17/2006 | US20060181956 Memory device having components for transmitting and receiving signals synchronously |
| 08/17/2006 | US20060181955 Semiconductor integrated circuit device |
| 08/17/2006 | US20060181954 Circuit and method for writing a binary value to a memory cell |
| 08/17/2006 | US20060181953 Systems, methods and devices for providing variable-latency write operations in memory devices |
| 08/17/2006 | US20060181952 Programmable analog control of a bitline evaluation circuit |
| 08/17/2006 | US20060181951 Method and apparatus for address generation |
| 08/17/2006 | US20060181950 Apparatus and method for SRAM decoding with single signal synchronization |
| 08/17/2006 | US20060181949 Operating system-independent memory power management |
| 08/16/2006 | EP1690260A1 Method for operating a data storage apparatus employing passive matrix addressing |
| 08/16/2006 | CN1820322A Data strobe synchronization circuit and method for double data rate, multi-bit writes |
| 08/16/2006 | CN1270385C Magnetic RAM of transistor with vertical structure and making method thereof |
| 08/15/2006 | US7093066 Method for bus capacitance reduction |
| 08/15/2006 | US7093059 Read-write switching method for a memory controller |
| 08/15/2006 | US7092314 Semiconductor memory device invalidating improper control command |
| 08/15/2006 | US7092313 Semiconductor integrated circuit |
| 08/15/2006 | US7092312 Pre-emphasis for strobe signals in memory device |
| 08/15/2006 | US7092310 Memory array with multiple read ports |
| 08/15/2006 | US7092305 Semiconductor memory device |
| 08/15/2006 | US7092302 Nonvolatile semiconductor memory device |
| 08/15/2006 | US7092296 Nonvolatile semiconductor memory |
| 08/15/2006 | US7092289 Efficient redundancy system for flash memories with uniformly sized blocks |
| 08/15/2006 | US7092276 Series feram cell array |
| 08/10/2006 | WO2003038620A3 Data storage method with error correction |
| 08/10/2006 | US20060176761 Clock generating circuit with multiple modes of operation |
| 08/10/2006 | US20060176760 Global and local read control synchronization method and system for a memory array configured with multiple memory subarrays |
| 08/10/2006 | US20060176759 Variable clocking read capture for double data rate memory devices |
| 08/10/2006 | US20060176758 Semiconductor memory devices having negatively biased sub word line scheme and methods of driving the same |
| 08/10/2006 | US20060176757 High performance CMOS NOR predecode circuit |
| 08/10/2006 | US20060176756 Write control circuitry and method for a memory array configured with multiple memory subarrays |
| 08/10/2006 | US20060176755 Semiconductor memory device |
| 08/10/2006 | US20060176754 Flat cell read only memory using common contacts for bit lines and virtual ground lines |
| 08/10/2006 | US20060176753 Global bit select circuit with dual read and write bit line pairs |
| 08/10/2006 | US20060175645 Semiconductor device and its manufacturing method |
| 08/10/2006 | DE102006005374A1 Halbleiterspeicherbauelement und Treiberverfahren The semiconductor memory device and driving method |
| 08/10/2006 | DE102004047764B4 Speicheranordnung, Verfahren zum Betrieb und Verwendung einer solchen Memory device, methods of operation and use of such |
| 08/09/2006 | EP1687827A1 Embedded memory with security row lock protection |
| 08/09/2006 | EP1461810B1 A method for reading a passive matrix-addressable device and a device for performing the method |
| 08/09/2006 | EP1299884B1 Flash memory architecture implementing simultaneously programmable multiple flash memory banks that are host compatible |
| 08/09/2006 | EP0827082B1 Semiconductor memory having arithmetic function |
| 08/09/2006 | CN2805023Y Wordline decoder and storage device |
| 08/09/2006 | CN1815622A Semi-conductor memory module with bus construction |
| 08/09/2006 | CN1269139C Semiconductor memory |
| 08/09/2006 | CN1269136C Synchronous semiconductor memory apparatus with plurality of memory sets and method for controlling same |
| 08/09/2006 | CN1269132C Semiconductor memory redundant circuit |