| Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368) |
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| 05/03/2007 | US20070097758 Power supply circuit for delay locked loop and its method |
| 05/03/2007 | DE69034227T2 EEprom-System mit Blocklöschung EEprom system with block erase |
| 05/03/2007 | DE19733396B4 Wortleitungstreiberschaltung für Halbleiterspeicherbauelement Word line drive circuit for semiconductor memory device |
| 05/02/2007 | EP1747559A4 Method and apparatus for a dual power supply to embedded non-volatile memory |
| 05/02/2007 | CN1956098A Semiconductor storage device |
| 05/02/2007 | CN1313934C Method and circuit for allocating memory arrangement addresses |
| 05/01/2007 | US7213121 Memory device having asynchronous/synchronous operating modes |
| 05/01/2007 | US7212465 Clock signal generation apparatus for use in semiconductor memory device and its method |
| 05/01/2007 | US7212464 Semiconductor memory device having a plurality of latch circuits coupled to each read amplifier |
| 05/01/2007 | US7212460 Line amplifier to supplement line driver in an integrated circuit |
| 05/01/2007 | US7212423 Memory agent core clock aligned to lane |
| 05/01/2007 | US7212422 Stacked layered type semiconductor memory device |
| 05/01/2007 | US7212055 Open-loop digital duty cycle correction circuit without DLL |
| 05/01/2007 | US7211854 Field effect devices having a gate controlled via a nanotube switching element |
| 05/01/2007 | US7211842 System with meshed power and signal buses on cell array |
| 04/26/2007 | WO2007048081A2 Clock reset address decoder for block memory |
| 04/26/2007 | WO2007048079A2 Clock reset address decoder for block memory |
| 04/26/2007 | US20070094418 Providing and receiving content over a wireless communication system |
| 04/26/2007 | US20070091715 Semiconductor memory device |
| 04/26/2007 | US20070091713 Onboard data storage and method |
| 04/26/2007 | US20070091712 Clocking architecture using a bi-directional reference clock |
| 04/26/2007 | US20070091711 Method of transferring signals between a memory device and a memory controller |
| 04/26/2007 | US20070091710 Clock circuit for semiconductor memories |
| 04/26/2007 | US20070091709 DRAM Semiconductor Memory Device with Increased Reading Accuracy |
| 04/26/2007 | US20070091708 Semiconductor storage device |
| 04/26/2007 | US20070091707 Semiconductor memory device, operational processing device and storage system |
| 04/26/2007 | US20070091693 Data input/output (i/o) apparatus for use in a memory device |
| 04/26/2007 | DE102005046997A1 Memory word storing apparatus for use in e.g. dynamic random access memory, has unit for distributed storage of memory word in memory element stacks, where word is stored in stacks in memory elements of different ranking order |
| 04/25/2007 | EP1776704A2 Apparatus and method for improving dynamic refresh in a semiconductor memory device with reduced standby power |
| 04/25/2007 | EP1525586B1 Sublithographic nanoscale memory architecture |
| 04/24/2007 | US7210016 Method, system and memory controller utilizing adjustable write data delay settings |
| 04/24/2007 | US7210015 Memory device having at least a first and a second operating mode |
| 04/24/2007 | US7209997 Controller device and method for operating same |
| 04/24/2007 | US7209406 Memory device with rapid word line switch |
| 04/24/2007 | US7209405 Memory device and method having multiple internal data buses and memory bank interleaving |
| 04/24/2007 | US7209402 Semiconductor memory |
| 04/24/2007 | US7209397 Memory device with clock multiplier circuit |
| 04/24/2007 | US7209395 Low leakage and leakage tolerant stack free multi-ported register file |
| 04/24/2007 | US7209383 Magnetic random access memory array having bit/word lines for shared write select and read operations |
| 04/24/2007 | US7209382 Magnetic random access memory |
| 04/24/2007 | US7209376 Stacked semiconductor memory device |
| 04/19/2007 | WO2007044226A1 Decoder for memory device with loading capacitor |
| 04/19/2007 | US20070086269 Clock control circuit and semiconductor memory device including the same and input operation method of semiconductor memory device |
| 04/19/2007 | US20070086268 Memory controller with staggered request signal output |
| 04/19/2007 | US20070086267 Clock generator having a delay locked loop and duty cycle correction circuit in a parallel configuration |
| 04/19/2007 | US20070086266 Directed auto-refresh for a dynamic random access memory |
| 04/19/2007 | US20070086265 Semiconductor storage device |
| 04/19/2007 | US20070086264 High-voltage generation circuits and nonvolatile semiconductor memory device with improved high-voltage efficiency and methods of operating |
| 04/19/2007 | US20070086263 Clock reset address decoder for block memory |
| 04/19/2007 | US20070086262 Integrated circuit chip with connectivity partitioning |
| 04/19/2007 | US20070086261 Directed auto-refresh for a dynamic random access memory |
| 04/19/2007 | US20070086260 Method of storing transformed units of data in a memory system having fixed sized storage blocks |
| 04/19/2007 | US20070086248 Method and apparatus for a dual power supply to embedded non-volatile memory |
| 04/19/2007 | US20070086104 Magnetic AND/NOR circuit |
| 04/19/2007 | US20070085591 Level shifter circuit with stress test function |
| 04/19/2007 | US20070085128 Semiconductor device and method for fabricating the same |
| 04/18/2007 | CN1311555C Non-volatile semiconductor memory device, electronic card and electronic device |
| 04/17/2007 | US7206956 Duty cycle distortion compensation for the data output of a memory device |
| 04/17/2007 | US7206917 Address decoding method and related apparatus by comparing mutually exclusive bit-patterns of addresses |
| 04/17/2007 | US7206252 Circuit and method for generating word line control signals and semiconductor memory device having the same |
| 04/17/2007 | US7206251 Dual port PLD embedded memory block to support read-before-write in one clock cycle |
| 04/17/2007 | US7206250 Method for storing data blocks in a memory |
| 04/17/2007 | US7206246 Semiconductor memory device, refresh control method thereof, and test method thereof |
| 04/17/2007 | US7206238 Integrated semiconductor memory comprising at least one word line and method |
| 04/17/2007 | US7205792 Methods and circuitry for implementing first-in first-out structure |
| 04/12/2007 | WO2007041249A2 Lus semiconductor and application circuit |
| 04/12/2007 | US20070081414 System and method of on-circuit asynchronous communication, between synchronous subcircuits |
| 04/12/2007 | US20070081413 Address Path Circuit with Row Redundant Scheme |
| 04/12/2007 | US20070081412 Apparatus and method for controlling dual port memory in a mobile communication terminal with multi processors |
| 04/12/2007 | US20070081411 Memory block reallocation in a flash memory device |
| 04/12/2007 | US20070081410 Wafer level i/o test and repair enabled by i/o layer |
| 04/12/2007 | US20070081376 Memory module and memory system |
| 04/11/2007 | CN1945746A Test circuit for multi-port memory device |
| 04/11/2007 | CN1945741A Semiconductor memory device and transmission/reception system provided with the same |
| 04/11/2007 | CN1945738A Circuit of local word line driver of DRAM |
| 04/11/2007 | CN1945734A Multi-port memory device with serial input/output interface |
| 04/11/2007 | CN1310253C Magnetic random access memory and manufacturing. method thereof |
| 04/10/2007 | US7203794 Destructive-read random access memory system buffered with destructive-read memory cache |
| 04/10/2007 | US7203129 Segmented MRAM memory array |
| 04/10/2007 | US7203128 Ferroelectric memory device and electronic apparatus |
| 04/10/2007 | US7203127 Apparatus and method for dynamically controlling data transfer in memory device |
| 04/10/2007 | US7203126 Integrated circuit systems and devices having high precision digital delay lines therein |
| 04/10/2007 | US7203125 Word line driving circuit with a word line detection circuit |
| 04/10/2007 | US7203124 System and method for negative word line driver circuit |
| 04/10/2007 | US7203123 Integrated DRAM memory device |
| 04/10/2007 | US7203122 User selectable banks for DRAM |
| 04/10/2007 | US7203121 Semiconductor integrated circuit device and data write method thereof |
| 04/10/2007 | US7203116 Semiconductor memory device |
| 04/10/2007 | US7203087 Fast reading, low consumption memory device and reading method thereof |
| 04/05/2007 | US20070076518 Microcomputer |
| 04/05/2007 | US20070076517 Semiconductor memory device and module for high frequency operation |
| 04/05/2007 | US20070076516 Semiconductor device with latency counter |
| 04/05/2007 | US20070076515 Memory and driving method of the same |
| 04/05/2007 | US20070076514 Lus semiconductor and application circuit |
| 04/05/2007 | US20070076513 Decoder for memory device with loading capacitor |
| 04/05/2007 | US20070076512 Three transistor wordline decoder |
| 04/05/2007 | US20070076511 Method and apparatus for mapping memory |
| 04/05/2007 | US20070076510 Method of Reducing Disturbs in Non-Volatile Memory |
| 04/05/2007 | US20070076509 Three-Dimensional Mask-Programmable Read-Only Memory |
| 04/05/2007 | US20070076508 Semiconductor memory chip |