Patents
Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368)
04/2006
04/11/2006US7027347 Semiconductor memory device
04/11/2006US7027342 Semiconductor memory device
04/11/2006US7027326 3T1D memory cells using gated diodes and methods of use thereof
04/11/2006US7026859 Control circuit for delay locked loop
04/06/2006WO2006036413A2 System and method for storing data
04/06/2006US20060072370 Phase-changeable memory devices and methods of forming the same
04/06/2006US20060072369 System and method for automatically saving memory contents of a data processing device on power failure
04/06/2006US20060072368 High density memory card assembly
04/06/2006US20060072367 Information management device
04/06/2006US20060072366 Multi-column addressing mode memory system including an integrated circuit memory device
04/06/2006DE10339894B4 Leseverstärker-Zuschalt/Abschalt-Schaltungsanordnung Sense amplifier Zuschalt / shutdown circuitry
04/06/2006DE102004047058A1 Integrated semiconductor memory, e.g. for dynamic RAM, has word wires linked to voltage potentials via switches conductively controlled in a test operating condition
04/05/2006EP1643356A1 Parallel processing device and parallel processing method
04/05/2006EP1642297A1 Data strobe synchronization circuit and method for double data rate, multi-bit writes
04/05/2006EP1002320B1 Block decoded wordline driver with positive and negative voltage modes using four terminal mos transistors
04/05/2006CN2770059Y Distributing box controller with sound prompting function
04/05/2006CN1756345A Broadcast and reception, and conditional access system therefor
04/05/2006CN1249725C Semiconductor storage device formed for optimizing testing technique and rebundance technique
04/05/2006CN1249722C Method for constructing multi-counter, multi-counter and multi-queue device using same
04/04/2006US7024524 Semiconductor storage
04/04/2006US7023761 Programmable stackable memory array system
04/04/2006US7023760 Memory arrangement for processing data, and method
04/04/2006US7023759 System and method for synchronizing memory array signals
04/04/2006US7023758 Low power manager for standby operation of a memory system
04/04/2006US7023757 Semiconductor device
04/04/2006US7023747 Semiconductor memory device and address conversion circuit
04/04/2006US7023746 High-speed synchronous memory device
04/04/2006US7023738 Full-swing wordline driving circuit
04/04/2006US7023254 Duty ratio corrector, and memory device having the same
04/04/2006US7023237 Semiconductor integrated circuits with power reduction mechanism
04/04/2006US7022572 Manufacturing method for integrated circuit having disturb-free programming of passive element memory cells
03/2006
03/30/2006WO2006033107A2 In vivo device for assisting and improving diastolic ventricular function
03/30/2006US20060069896 System and method for storing data
03/30/2006US20060069895 Method, system and memory controller utilizing adjustable write data delay settings
03/30/2006US20060067158 Integrated circuit memory device supporting an N bit prefetch scheme and a 2N burst length
03/30/2006US20060067157 Memory system with two clock lines and a memory device
03/30/2006US20060067156 Memory device, memory controller and memory system having bidirectional clock lines
03/30/2006US20060067155 Latency normalization by balancing early and late clocks
03/30/2006US20060067154 Biasing circuit for use in a non-volatile memory device
03/30/2006US20060067153 Memory arrangement
03/30/2006US20060065920 Semiconductor memory device and method for producing the same
03/30/2006DE102005045696A1 Failed memory location address programming method for use in memory device, involves programming fail address signals simultaneously once by programming signal during read or write operations
03/30/2006DE102004045903A1 Circuit to connect high and low voltage signals especially to control a semiconductor memory has low voltage logic unit holding memory and voltage increase circuit
03/29/2006EP1640872A1 Data transfer method and system
03/29/2006EP1640847A2 Dynamic random access memory (DRAM) semiconductor device
03/29/2006EP1639705A2 Circuit for testing and fine tuning integrated circuit (switch control circuit)
03/29/2006EP1639602A2 Low power manager for standby operation of a memory system
03/29/2006EP1639601A2 Asynchronous jitter reduction technique
03/29/2006CN1248082C Semiconductor device, semiconductor circuit, electronic device and clock signal supply and control method
03/28/2006US7020794 Interleaved delay line for phase locked and delay locked loops
03/28/2006US7020739 Memory controller, flash memory system having memory controller and method for controlling flash memory device
03/28/2006US7020042 Compact decode and multiplexing circuitry for a multi-port memory having a common memory interface
03/28/2006US7020031 Synchronous semiconductor memory devices and data strobe input buffers with an input buffer circuit and a detection circuit for buffering data thereto
03/28/2006US7020024 Methods and devices for increasing voltages on non-selected wordlines during erasure of a flash memory
03/28/2006US7020002 Semiconductor integrated circuit
03/28/2006US7020001 Multi-level semiconductor memory architecture and method of forming the same
03/23/2006US20060062075 Magnetic memory
03/23/2006US20060062074 Method for intracellular modifications within living cells using pulsed electric fields
03/23/2006US20060062073 Recording medium and producing method thereof, reproducing method and reproducing apparatus, and copyright managing method
03/23/2006US20060062072 Semiconductor memory device with a stacked-bank architecture and method for driving word lines of the same
03/23/2006US20060062071 Semiconductor memory device
03/23/2006US20060062067 Magnetoresistive memory cell array and mram memory comprising such array
03/23/2006US20060062058 Interleaved delay line for phase locked and delay locked loops
03/23/2006US20060062057 Multi-port memory
03/23/2006US20060062056 Selectable clock input
03/23/2006US20060062048 Flash memory data correction and scrub techniques
03/22/2006EP1638109A2 Variable boost voltage row driver circuit and method, and memory device and system including same
03/22/2006EP1638108A1 Multi-port memory
03/22/2006EP1366495A4 High speed signal path and method
03/22/2006CN1751357A Memory having variable refresh control and method therefor
03/22/2006CN1246856C Semicoductor memory device and its control method
03/22/2006CN1246854C IC storage with fuse detection circuit and its method
03/21/2006US7017068 Adaptive clock skew in a variably loaded memory bus
03/21/2006US7017027 Address counter control system with path switching
03/21/2006US7017010 Integrated circuit memory device supporting an N bit prefetch scheme and a 2N burst length
03/21/2006US7016988 Output buffer register, electronic circuit and method for delivering signals using same
03/21/2006US7016259 Apparatus for calibrating the relative phase of two reception signals of a memory chip
03/21/2006US7016258 Semiconductor device having input/output sense amplifier for multiple sampling
03/21/2006US7016257 Semiconductor memory device capable of generating variable clock signals according to modes of operation
03/21/2006US7016256 Data input unit of synchronous semiconductor memory device, and data input method using the same
03/21/2006US7016255 Multi-port memory device
03/21/2006US7016254 Synchronous flash memory with virtual segment architecture
03/21/2006US7016253 Fixed-address digital data access system
03/21/2006US7016246 Three-transistor refresh-free pipelined dynamic random access memory
03/21/2006US7016239 Leakage tolerant register file
03/21/2006US7016238 Semiconductor memory device
03/21/2006US7016233 Wordline decoder and memory device
03/21/2006US7016215 Ferroelectric memory device with a spare memory cell array
03/21/2006US7015739 Integrated circuit devices having duty cycle correction circuits that receive control signals over first and second separate paths and methods of operating the same
03/21/2006US7015737 Delay locked loop circuit capable of operating in a low frequency
03/16/2006US20060056269 Timing generation circuit and semiconductor test device having the timing generation circuit
03/16/2006US20060056268 Address buffer circuit for memory device
03/16/2006US20060056267 Driving unit and display apparatus having the same
03/16/2006US20060056266 Integrated semiconductor memory comprising at least one word line and method
03/16/2006US20060056265 Nonvolatile phase change memory device and biasing method therefor
03/16/2006US20060056264 Variable boost voltage row driver circuit and method and memory device and system including same
03/16/2006US20060056263 Semiconductor memory device and electronic apparatus
03/16/2006US20060056262 Serial memory comprising means for protecting an extended memory array during a write operation
03/16/2006US20060056261 Method for producing an extended memory array and apparatus
03/16/2006DE102004041330B3 Speicherschaltung mit ein Widerstandsspeicherelement aufweisenden Speicherzellen Memory circuit having a resistive memory element having memory cells
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