Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368) |
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07/12/2006 | CN1264277C Microreglation of frequency range for delay line |
07/11/2006 | US7076013 Clock synchronization device |
07/11/2006 | US7075857 Distributed write data drivers for burst access memories |
07/11/2006 | US7075856 Apparatus for latency specific duty cycle correction |
07/11/2006 | US7075855 Memory output timing control circuit with merged functions |
07/11/2006 | US7075854 Semiconductor memory device, write control circuit and write control method for the same |
07/11/2006 | US7075853 Semiconductor memory device including internal clock doubler |
07/11/2006 | US7075852 Semiconductor memory device of hierarchy word type and sub word driver circuit |
07/11/2006 | US7075851 Semiconductor memory device inputting/outputting data and parity data in burst operation |
07/11/2006 | US7075850 Compact decode and multiplexing circuitry for a multi-port memory having a common memory interface |
07/11/2006 | US7075849 Semiconductor memory device and layout method thereof |
07/11/2006 | US7075846 Apparatus for interleave and method thereof |
07/11/2006 | US7075838 Semiconductor device and test method of testing the same |
07/11/2006 | US7075837 Redundancy relieving circuit |
07/11/2006 | US7075833 Circuit for detecting negative word line voltage |
07/11/2006 | US7075829 Programmable memory address and decode circuits with low tunnel barrier interpoly insulators |
07/11/2006 | US7075808 Method for bus capacitance reduction |
07/06/2006 | WO2006069761A1 Memory with selectable single cell or twin cell configuration and method of operating a memory |
07/06/2006 | US20060146641 High speed DRAM architecture with uniform access latency |
07/06/2006 | US20060146640 Memory device and method for manufacturing the same |
07/06/2006 | US20060146639 Apparatus and method for hierarchical decoding of dense memory arrays using multiple levels of multiple-headed decoders |
07/06/2006 | US20060146638 Memory cell having improved read stability |
07/06/2006 | US20060146637 I/O data interconnect reuse as repeater |
07/06/2006 | US20060146619 Semiconductor memory device and method for controlling the same |
07/05/2006 | EP1488425B1 Inexact addressable digital memory |
07/05/2006 | CN1799103A Low power manager for standby operation |
07/05/2006 | CN1263138C Semiconductor memory having configuration of memory cells |
07/05/2006 | CN1263135C Integrated circuit and mfg. method thereof |
07/05/2006 | CN1263039C Semiconductor storage apparatus for increasing bus efficiency and method thereof |
07/05/2006 | CN1263038C A data writing/reading method, a de-interleaving method, a data processing method, a storage and a storage driving apparatus |
07/05/2006 | CN1262933C Compound storage device |
07/04/2006 | US7073157 Array-based architecture for molecular electronics |
07/04/2006 | US7073035 Techniques for increasing bandwidth in port-per-module memory systems having mismatched memory modules |
07/04/2006 | US7073014 Synchronous non-volatile memory system |
07/04/2006 | US7072530 Semiconductor memory apparatus |
07/04/2006 | US7072243 Semiconductor memory |
07/04/2006 | US7072242 Semiconductor integrated circuit device |
07/04/2006 | US7072241 Semiconductor memory device and multi-chip module comprising the semiconductor memory device |
07/04/2006 | US7072240 Apparatus for processing data, memory bank used therefor, semiconductor device, and memory for reading out pixel data |
07/04/2006 | US7072230 Method and apparatus for standby power reduction in semiconductor devices |
07/04/2006 | US7072223 Asymmetric band-gap engineered nonvolatile memory device |
07/04/2006 | US7072218 Semiconductor integrated circuit, semiconductor non-volatile memory, memory card, and microcomputer |
07/04/2006 | US7072214 NOR flash memory device and method of shortening a program time |
07/04/2006 | US7072212 String programmable nonvolatile memory with NOR architecture |
07/04/2006 | US7072207 Thin film magnetic memory device for writing data of a plurality of bits in parallel |
07/04/2006 | US7072202 Semiconductor device having a power down mode |
07/04/2006 | US7072201 Memory module |
07/04/2006 | US7071768 Semiconductor integrated circuit having controllable internal supply voltage |
07/04/2006 | US7071565 Patterning three dimensional structures |
06/29/2006 | WO2006066946A1 Internal column counter for testing a memory in a compression test mode and method of operation thereof |
06/29/2006 | WO2003107314A3 Method of driving a shift register, a shift register, a liquid crystal display device having the shift register |
06/29/2006 | US20060143491 Memory system and method for strobing data, command and address signals |
06/29/2006 | US20060140047 Apparatus, system and method for generating self-generated strobe signal for peripheral device |
06/29/2006 | US20060140046 Synchronous storage device and control method therefor |
06/29/2006 | US20060140045 Method and apparatus for timing adjustment |
06/29/2006 | US20060140044 Clock signal generation apparatus for use in semiconductor memory device and its method |
06/29/2006 | US20060140043 Flash memory architecture for optimizing performance of memory having multi-level memory cells |
06/29/2006 | US20060140042 High speed wordline decoder for driving a long wordline |
06/29/2006 | US20060140041 Leakage current management |
06/29/2006 | US20060140040 Memory with selectable single cell or twin cell configuration |
06/29/2006 | US20060140021 Circuit for generating data strobe signal of semiconductor memory device |
06/29/2006 | US20060139052 Semiconductor integrated circuits with power reduction mechanism |
06/29/2006 | DE19916599B4 Ferroelektrischer SWL-Speicher und Schaltung zum Ansteuern desselben The same SWL ferroelectric memory circuit for driving and |
06/29/2006 | DE10110274B4 Integrierter Speicher mit mehreren Speicherzellenfeldern Integrated memory having a plurality of memory cell arrays |
06/28/2006 | EP1673782A2 Mram array with segmented word and bit lines |
06/28/2006 | CN1262066C Timer circuit and semiconductor memory incorporating the timer circuit |
06/28/2006 | CN1261947C Integrated circuit with flag register for block selection of nonvolatile cells for bulk operations |
06/28/2006 | CN1261946C Semiconductor memory and controlling method thereof |
06/27/2006 | US7068567 Data output controller in semiconductor memory device and control method thereof |
06/27/2006 | US7068566 Semiconductor memory device capable of outputting data when a read request not accompanied with an address change being issued |
06/27/2006 | US7068565 Clock control in sequential circuit for low-power operation and circuit conversion to low-power sequential circuit |
06/27/2006 | US7068564 Timer lockout circuit for synchronous applications |
06/27/2006 | US7068563 Compact decode and multiplexing circuitry for a multi-port memory having a common memory interface |
06/27/2006 | US7068562 Semiconductor device with non-volatile memory and random access memory |
06/27/2006 | US7068561 Semiconductor memory device for controlling cell block with state machine |
06/27/2006 | US7068558 Semiconductor memory device having row path control circuit and operating method thereof |
06/27/2006 | US7068546 Integrated memory having a voltage generator circuit for generating a voltage supply for a read/write amplifier |
06/27/2006 | US7068538 Memory circuit with non-volatile identification memory and associated method |
06/27/2006 | US7068280 Method and apparatus to provide overlay buffering |
06/27/2006 | US7068084 Delay locked loop capable of compensating for delay of internal clock signal by variation of driving strength of output driver in semiconductor memory device |
06/27/2006 | US7068069 Control circuit and reconfigurable logic block |
06/27/2006 | US7068067 Semiconductor circuit device having active and standby states |
06/22/2006 | US20060136769 Interface circuit for strobe-based systems |
06/22/2006 | US20060133188 Method of controlling mode register set operation in memory device and circuit thereof |
06/22/2006 | US20060133187 Memory having internal column counter for compression test mode |
06/22/2006 | US20060133186 Memory access using multiple activated memory cell rows |
06/22/2006 | US20060133185 Memory array leakage reduction circuit and method |
06/22/2006 | US20060133184 Plasma damage protection circuit |
06/22/2006 | US20060133183 Multi read port bit line |
06/22/2006 | US20060133182 Semiconductor memory device for reducing peak current during refresh operation |
06/22/2006 | US20060133180 Semiconductor memory device and semiconductor integrated circuit device |
06/22/2006 | US20060133170 Memory circuit |
06/22/2006 | US20060133168 Semiconductor memory device for reducing chip area |
06/22/2006 | US20060133164 Semiconductor memory with wordline timing |
06/22/2006 | DE102004059206A1 Dynamic RAM module, has address converter designed such that its output address depends on its input address and numerical values stored in address storage, and address decoder selecting memory cell which is assigned to output address |
06/21/2006 | EP1671329A1 Method and system for controlling write current in magnetic memory |
06/21/2006 | EP1428222B1 Background operation for memory cells |
06/21/2006 | EP1031992B1 Flash EEPROM system |
06/21/2006 | CN1790545A Memory selecting signal control circuit and method used in semiconductor storge device |
06/21/2006 | CN1790541A Semiconductor memory device with a stacked-bank architecture and method for driving word lines of the same |