Patents
Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368)
07/2007
07/26/2007US20070171754 Security circuit using at least two finite state machine units and methods using the same
07/26/2007US20070171742 Semiconductor memory device having an open bit line structure, and method of testing the same
07/26/2007US20070171726 Program method of flash memory capable of compensating reduction of read margin between states due to hot temperature stress
07/26/2007US20070171712 Bitline transistor architecture for flash memory
07/26/2007US20070171704 High-bandwidth magnetoresistive random access memory devices and methods of operation thereof
07/26/2007US20070170958 High voltage driver circuit with fast slow voltage operation
07/25/2007EP1269475B1 Multidimensional addressing architecture for electronic devices
07/24/2007US7248538 Semiconductor memory device
07/24/2007US7248536 Integrated semiconductor memory and method for operating an integrated semiconductor memory
07/24/2007US7248535 Semiconductor memory devices having negatively biased sub word line scheme and methods of driving the same
07/24/2007US7248534 Semiconductor memory device
07/24/2007US7248529 Semiconductor device having fuse and its manufacture method
07/24/2007US7248527 Self refresh period control circuits
07/24/2007US7248518 Self-timed memory device providing adequate charging time for selected heaviest loading row
07/24/2007US7248514 Semiconductor memory device
07/24/2007US7248513 Semiconductor memory device having memory block configuration
07/24/2007US7248507 CMIS semiconductor nonvolatile storage circuit
07/19/2007US20070168829 Methods to make DRAM fully compatible with SRAM
07/19/2007US20070165482 Sequential access memory
07/19/2007US20070165481 Method for performing a burn-in test
07/19/2007US20070165480 Systems and methods for a controllable release of power supply in a mobile device
07/19/2007US20070165479 Local wordline driver scheme to avoid fails due to floating wordline in a segmented wordline driver scheme
07/19/2007US20070165478 Modular i/o bank architecture
07/19/2007US20070165477 Method and apparatus to adjust voltage for storage location reliability
07/19/2007US20070165468 Semiconductor memory device
07/19/2007US20070165463 Self timing write architecture for semiconductor memory and method for providing the same
07/19/2007DE102006061166A1 Reduzierung des gateinduzierten Drainleckstroms durch Spannungsregelung der Hauptwortleitung Reduction of the gate induced drain leakage current through voltage control of the main word line
07/19/2007DE102006060245A1 Subwortleitungstreiber, Subwortleitungstreiberschaltkreis, Halbleiterspeicherbauelement und Verfahren zum Treiben einer Subwortleitung Subwortleitungstreiber, Subwortleitungstreiberschaltkreis, semiconductor memory device and method of driving a sub-word
07/18/2007EP1808861A1 Multi-port memory based on a plurality of memory cores
07/18/2007EP1595261B1 Dram output circuitry supporting sequential data capture to reduce core access times
07/18/2007EP1446723B1 Method employed by a base station for transferring data
07/18/2007EP1366495B1 High speed signal path and method
07/18/2007CN1327451C Programmable address logic for diode-based solid memory
07/18/2007CN101002272A Addressing data within dynamic random access memory
07/18/2007CN101000794A Semiconductor memory device having ram zone and rom zone
07/17/2007US7246250 Memory device controls delay time of data input buffer in response to delay control information based on a position of a memory device received from memory controller
07/17/2007US7246198 Content addressable memory with programmable word width and programmable priority
07/17/2007US7245556 Methods for writing non-volatile memories for increased endurance
07/17/2007US7245555 Automatic address transition detection (ATD) control for reduction of sense amplifier power consumption
07/17/2007US7245554 Integrated semiconductor memory with clock-synchronous access control
07/17/2007US7245553 Memory system and method for strobing data, command and address signals
07/17/2007US7245552 Parallel data path architecture
07/17/2007US7245551 Read command triggered synchronization circuitry
07/17/2007US7245550 Memory array decoder
07/17/2007US7245549 Semiconductor memory device and method of controlling the semiconductor memory device
07/17/2007US7245538 High voltage generation and regulation circuit in a memory device
07/17/2007US7245534 Nonvolatile semiconductor memory
07/17/2007US7245158 Circuit wiring layout in semiconductor memory device
07/12/2007US20070159914 Semiconductor integrated circuit
07/12/2007US20070159913 Circuit and method for generating write data mask signal in synchronous semiconductor memory device
07/12/2007US20070159912 Integrated Circuit Memory Device with Delayed Write Command Processing
07/12/2007US20070159911 Semiconductor memory device and method of operating same
07/12/2007US20070159910 Command generating circuit and semiconductor memory device having the same
07/12/2007US20070159906 Semiconductor memory device, refresh control method thereof, and test method thereof
07/12/2007US20070159878 Phase change memory device
07/12/2007US20070158695 System with meshed power and signal buses on cell array
07/12/2007DE102006041946A1 Adressenkonverter und Halbleiterspeicherbauelement Address converter and semiconductor memory device
07/12/2007DE102006036147A1 Zeilendecoder und zugehöriges Halbleiterspeicherbauelement Row decoder and related semiconductor memory device
07/12/2007DE10196008B4 Synchroner Nulllatenz Zero Bus Turnaround Flashspeicher Synchronous zero latency Zero Bus Turnaround Flash memory
07/11/2007EP1805803A2 Scrambling method to reduce wordline coupling noise
07/11/2007EP1086465B1 Method and apparatus for a serial access memory
07/10/2007US7242636 Clock control circuit and semiconductor memory device including the same and input operation method of semiconductor memory device
07/10/2007US7242635 Semiconductor integrated circuit device, data processing system and memory system
07/10/2007US7242634 Pseudo-dynamic word-line driver
07/10/2007US7242633 Memory device and method of transferring data in memory device
07/10/2007US7242632 Memory device, memory managing method and program
07/10/2007US7242627 Semiconductor device
07/10/2007US7242610 Ultraviolet erasable semiconductor memory device
07/10/2007US7242601 Deterministic addressing of nanoscale devices assembled at sublithographic pitches
07/10/2007US7242232 Internal signal replication device and method
07/10/2007US7242214 Semiconductor integrated circuits with power reduction mechanism
07/05/2007US20070153621 Semiconductor memory device and word line addressing method in which neighboring word lines are discontinuously addressed
07/05/2007US20070153620 Nonvolatile semiconductor memory device
07/05/2007US20070153619 Address converter semiconductor device and semiconductor memory device having the same
07/05/2007US20070153618 Semiconductor device
07/05/2007US20070153616 Phase-change memory device
07/05/2007US20070153615 Semiconductor memory device and method for operating a semiconductor memory device
07/05/2007US20070153613 Semiconductor memory
07/04/2007EP1804249A1 Address decoder, storage device, processor device, and address decoding method for the storage device
07/04/2007CN1992075A Address converter semiconductor device and semiconductor memory device having the same
07/04/2007CN1992074A Row decoder for preventing leakage current and semiconductor memory device having the same
07/04/2007CN1992073A Address decoder, storage device, processor device, and address decoding method
07/04/2007CN1992071A Distributed memory in field-programmable gate array integrated circuit devices
07/04/2007CN1992069A Semiconductor memory device having layout for minimizing area of sense amplifier region and word line driver region
07/03/2007US7240233 Hybrid parallel/serial bus interface
07/03/2007US7239576 Memory device and method of controlling the same
07/03/2007US7239575 Delay-locked loop having a pre-shift phase detector
07/03/2007US7239574 Synchronous storage device and control method therefor
07/03/2007US7239573 Method of storing data in blocks per operation
07/03/2007US7239572 Multiport memory
07/03/2007US7239571 Semiconductor memory device
07/03/2007US7239565 Memory array with precharge control circuit
07/03/2007US7239563 Semiconductor device for outputting data read from a read only storage device
07/03/2007US7239559 Methods and apparatus for accessing memory
07/03/2007US7238982 Split gate type flash memory device and method for manufacturing same
07/03/2007US7238570 Semiconductor memory device and method for producing the same
07/03/2007CA2284023C Broadcast and reception system, and conditional access system therefor
06/2007
06/28/2007US20070147168 Methods for writing non-volatile memories for increased endurance
06/28/2007US20070147167 Synchronous semiconductor memory device
06/28/2007US20070147166 Apparatus and method of generating output enable signal for semiconductor memory apparatus
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