| Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368) |
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| 02/15/2000 | US6026044 High speed video frame buffer |
| 02/15/2000 | US6026036 Synchronous semiconductor memory device having set up time of external address signal reduced |
| 02/15/2000 | US6026029 Semiconductor memory device |
| 02/15/2000 | US6026021 Semiconductor memory array partitioned into memory blocks and sub-blocks and method of addressing |
| 02/15/2000 | US6026013 Quantum random address memory |
| 02/15/2000 | US6026012 Dual port random access memory |
| 02/15/2000 | US6025751 Self-bootstrapping word-line driver circuit and method |
| 02/08/2000 | US6023441 Method and apparatus for selectively enabling individual sets of registers in a row of a register array |
| 02/08/2000 | US6023439 Programmable logic array integrated circuits |
| 02/08/2000 | US6023432 Device and method for repairing a memory array by storing each bit in multiple memory cells in the array |
| 02/08/2000 | US6023421 Selective connectivity between memory sub-arrays and a hierarchical bit line structure in a memory array |
| 02/08/2000 | US6022094 Memory expansion circuit for ink jet print head identification circuit |
| 02/03/2000 | DE19924048A1 Semiconductor memory device clock phase correction circuit for e.g. a delay locked loop (DLL) circuit |
| 02/02/2000 | EP0977121A2 Non-volatile memory, recording apparatus and recording method |
| 02/02/2000 | EP0976133A1 Memory device and method |
| 02/02/2000 | CN1243317A Non-volatile memory, recording apparatus and recording method |
| 02/01/2000 | US6021512 Data processing system having memory sub-array redundancy and method therefor |
| 02/01/2000 | US6021089 Address transition detection circuit |
| 02/01/2000 | US6021087 Dynamic logic memory addressing circuits, systems, and methods with decoder fan out greater than 2:1 |
| 02/01/2000 | US6021083 Block decoded wordline driver with positive and negative voltage modes |
| 02/01/2000 | US6021082 Semiconductor memory device including an internal power supply circuit having standby and activation mode |
| 02/01/2000 | US6021080 Semiconductor memory device having a voltage converting circuit |
| 02/01/2000 | US6021074 Direct access to random redundant logic gates by using multiple short addresses |
| 02/01/2000 | US6020763 High speed decoder without race condition |
| 01/27/2000 | DE19928454A1 Solid state memory that uses a series decoder circuit coupled to a series address register that is used to apply selection signals to the memory blocks |
| 01/26/2000 | EP0974978A1 Semiconductor memory device capable of performing a write operation 1 or 2 cycles after receiving a write command without a dead cycle |
| 01/26/2000 | EP0974977A2 Integrated memory |
| 01/26/2000 | EP0974905A2 An integrated circuit memory device with redundancy |
| 01/26/2000 | EP0974230A1 Method of downloading of data to an mpeg receiver/decoder and mpeg transmission system for implementing the same |
| 01/26/2000 | EP0974229A1 Broadcast and reception system, and conditional access system therefor |
| 01/26/2000 | EP0617363B1 Defective cell substitution in EEprom array |
| 01/25/2000 | US6018490 Programmable logic array integrated circuits |
| 01/25/2000 | US6018489 Mock wordline scheme for timing control |
| 01/25/2000 | US6018255 Line decoder for memory devices |
| 01/25/2000 | US6018253 Register with current-steering input network |
| 01/19/2000 | EP0972406A1 Method and apparatus for preventing fraudulent access in a conditional access system |
| 01/19/2000 | CN1241783A Semiconductor memory device |
| 01/18/2000 | US6016284 Address transition detector for memory device |
| 01/18/2000 | US6016281 Memory with word line voltage control |
| 01/18/2000 | US6016255 Portable data carrier mounting system |
| 01/13/2000 | DE19830111A1 Integrierter Speicher Built-in Memory |
| 01/12/2000 | EP0970460A1 Address decoder system |
| 01/11/2000 | US6014341 Synchronous-type semiconductor storage |
| 01/11/2000 | US6014225 Frame buffer control method and circuit |
| 01/05/2000 | EP0968611A1 Data processing system |
| 01/05/2000 | EP0968610A1 Transmission and reception of television programmes and other data |
| 01/05/2000 | EP0968609A1 Signal generation and broadcasting |
| 01/05/2000 | EP0968608A1 Broadcast and reception system, and receiver/decoder and remote controller therefor |
| 01/05/2000 | EP0968607A1 Smartcard for use with a receiver of encrypted broadcast signals, and receiver |
| 01/05/2000 | EP0968602A1 Extracting data sections from a transmitted data stream |
| 01/05/2000 | EP0968469A1 Computer memory organization |
| 01/05/2000 | EP0968468A1 Computer memory organization |
| 01/05/2000 | EP0968465A1 Television or radio control system development |
| 01/05/2000 | DE19918932A1 Dynamic RAM (DRAM) type semiconductor memory with numerous memory cells |
| 01/04/2000 | US6011751 Sychronous semiconductor memory device with burst address counter operating under linear/interleave mode of single data rate/double data rate scheme |
| 01/04/2000 | US6011750 Semiconductor device having address transition detecting circuit |
| 01/04/2000 | US6011746 Word line driver for semiconductor memories |
| 01/04/2000 | US6011744 Programmable logic device with multi-port memory |
| 01/04/2000 | US6011730 Programmable logic device with multi-port memory |
| 12/29/1999 | EP0966742A2 Pump control circuit |
| 12/29/1999 | EP0966741A1 Dram with integral sram and systems and methods using the same |
| 12/29/1999 | CN1240043A Bi-directional shift register |
| 12/29/1999 | CN1047866C Self-bootstrapping device |
| 12/28/1999 | US6009041 Method and circuit for trimming the internal timing conditions of a semiconductor memory device |
| 12/28/1999 | US6009038 Addressing unit |
| 12/28/1999 | US6009037 Dynamic logic memory addressing circuits, systems, and methods with reduced capacitively loaded predecoders |
| 12/28/1999 | US6009035 Semiconductor memory device |
| 12/28/1999 | US6009022 Node-precise voltage regulation for a MOS memory system |
| 12/28/1999 | US6009019 Real time DRAM eliminating a performance penalty for crossing a page boundary |
| 12/22/1999 | EP0965130A1 Non-volatile memory enabling simultaneous reading and writing by time multiplexing a decode path |
| 12/21/1999 | US6006310 Single memory device that functions as a multi-way set associative cache memory |
| 12/21/1999 | US6005826 Address signal transition detecting circuit for semiconductor memory device |
| 12/21/1999 | US6005824 Inherently compensated clocking circuit for dynamic random access memory |
| 12/21/1999 | US6005823 Memory device with pipelined column address path |
| 12/21/1999 | US6005822 Bank selectable Y-decoder circuit and method of operation |
| 12/21/1999 | US6005803 Memory address decoding circuit for a simultaneous operation flash memory device with a flexible bank partition architecture |
| 12/21/1999 | US6005796 Single ended simpler dual port memory cell |
| 12/21/1999 | US6005795 Single ended dual port memory cell |
| 12/21/1999 | US6005794 Static memory with low power write port |
| 12/21/1999 | US6005793 Multiple-bit random-access memory array |
| 12/16/1999 | WO1999039909A3 Memory expansion circuit for ink jet print head identification circuit |
| 12/15/1999 | EP0963587A1 High voltage nmos pass gate for flash memory with high voltage generator |
| 12/15/1999 | CN1238527A Improved dynamic access memory delay circuits and methods therefor |
| 12/14/1999 | US6002638 Memory device having a switchable clock output and method therefor |
| 12/14/1999 | US6002636 Semiconductor memory drive capable of canceling power supply noise |
| 12/14/1999 | US6002635 Semiconductor memory device with control for auxiliary word lines for memory cell selection |
| 12/14/1999 | US6002633 Performance optimizing compiler for building a compiled SRAM |
| 12/14/1999 | US6002632 Circuits, systems, and methods with a memory interface for augmenting precharge control |
| 12/14/1999 | US6002631 Semiconductor memory device having a mode in which a plurality of data are simultaneously read out of memory cells of one row and different columns |
| 12/14/1999 | US6002630 On chip voltage generation for low power integrated circuits |
| 12/14/1999 | US6002618 NMOS input receiver circuit |
| 12/14/1999 | US6002606 Semiconductor memory device |
| 12/14/1999 | US6002286 Apparatus and method for a programmable interval timing generator in a semiconductor memory |
| 12/14/1999 | US6002275 Single ended read write drive for memory |
| 12/09/1999 | WO1999063543A1 Block decoded wordline driver with positive and negative voltage modes using four terminal mos transistors |
| 12/08/1999 | CN1237768A Dram incorporating self refresh control circuit and system LSI including the dram |
| 12/08/1999 | CN1237767A Semiconductor memory device |
| 12/07/1999 | US5999482 High speed memory self-timing circuitry and methods for implementing the same |
| 12/07/1999 | US5999479 Row decoder for nonvolatile memory having a low-voltage power supply |
| 12/07/1999 | US5999478 Highly integrated tri-port memory buffers having fast fall-through capability and methods of operating same |