| Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368) |
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| 04/05/2000 | EP0991075A1 Circuit device for providing a hierarchical row decoding in semiconductor memory devices |
| 04/05/2000 | EP0829095A4 Method and apparatus for reducing latency time on an interface by overlapping transmitted packets |
| 04/04/2000 | US6047352 Memory system, method and predecoding circuit operable in different modes for selectively accessing multiple blocks of memory cells for simultaneous writing or erasure |
| 04/04/2000 | US6046958 Latching wordline driver for multi-bank memory |
| 04/04/2000 | US6046957 Semiconductor memory device with flexible configuration |
| 04/04/2000 | US6046956 Semiconductor device, word line driver circuit and word line driving method |
| 04/04/2000 | US6046955 Semiconductor memory device with testable spare columns and rows |
| 04/04/2000 | US6046948 Low word line to bit line short circuit standby current semiconductor memory |
| 04/04/2000 | US6046946 Method and apparatus for testing multi-port memory using shadow read |
| 04/04/2000 | US6046931 Method and apparatus for a RAM circuit having N-nary output interface |
| 04/04/2000 | US6046930 Memory array and method for writing data to memory |
| 04/04/2000 | US6046621 Differential signal generator with dynamic beta ratios |
| 03/30/2000 | WO2000017886A1 Bank selector circuit for a simultaneous operation flash memory device with a flexible bank partition architecture |
| 03/30/2000 | WO2000017885A1 Memory address decoding circuit for a simultaneous operation flash memory device with a flexible bank partition architecture |
| 03/30/2000 | WO2000017884A1 Simultaneous operation flash memory device with a flexible bank partition architecture |
| 03/30/2000 | WO2000017882A1 Method of making flexibly partitioned metal line segments for a simultaneous operation flash memory device with a flexible bank partition architecture |
| 03/30/2000 | WO2000017757A2 Redundant form address decoder for memory system |
| 03/30/2000 | DE19844666C1 Decoderelement zur Erzeugung eines Ausgangssignals mit drei unterschiedlichen Potentialen und Betriebsverfahren für das Decoderelement Decoder element for generating an output signal with three different potentials and operating procedures for the decoder element |
| 03/29/2000 | EP0989565A1 Integrated memory device |
| 03/28/2000 | US6044432 Method and system for latching an address for accessing synchronous random access memory using a single address status signal control line |
| 03/28/2000 | US6044429 Method and apparatus for collision-free data transfers in a memory device with selectable data or address paths |
| 03/28/2000 | US6044426 Memory system having memory devices each including a programmable internal register |
| 03/28/2000 | US6044037 Semiconductor device |
| 03/28/2000 | US6044036 Buffer circuit, memory device, and integrated circuit for receiving digital signals |
| 03/28/2000 | US6044035 Semiconductor memory device having level-shifted precharge signal |
| 03/28/2000 | US6044034 Multiport memory having plurality of groups of bit lines |
| 03/28/2000 | US6044032 Addressing scheme for a double data rate SDRAM |
| 03/28/2000 | US6044031 Programmable bit line drive modes for memory arrays |
| 03/28/2000 | US6044029 Device and method for repairing a memory array by storing each bit in multiple memory cells in the array |
| 03/28/2000 | US6044028 Semiconductor storage device and electronic equipment using the same |
| 03/28/2000 | US6044027 Circuit and method for providing a substantially constant time delay over a range of supply voltages |
| 03/28/2000 | US6044020 Nonvolatile semiconductor memory device with a row decoder circuit |
| 03/28/2000 | US6043684 Method and apparatus for reducing skew between input signals and clock signals within an integrated circuit |
| 03/28/2000 | US6043527 Circuits and methods for a memory cell with a trench plate trench capacitor and a vertical bipolar read device |
| 03/23/2000 | WO2000016399A1 Semiconductor circuit |
| 03/23/2000 | WO2000016379A2 Semiconductor memory array partitioned into memory blocks and sub-blocks and method of addressing |
| 03/23/2000 | WO2000016260A1 Data processor and data sequence conversion method |
| 03/23/2000 | DE19842852A1 Integrierter Speicher Built-in Memory |
| 03/21/2000 | US6041016 Optimizing page size in mixed memory array using address multiplexing |
| 03/21/2000 | US6041015 Semiconductor type memory device having consecutive access to arbitrary memory address |
| 03/21/2000 | US6041014 Nonvolatile semiconductor memory device having row decoder |
| 03/21/2000 | US6041013 Semiconductor memory device, method of laying out semiconductor memory device, method of driving semiconductor pattern of semiconductor device |
| 03/21/2000 | US6040998 Memory activation devices and methods |
| 03/16/2000 | DE19841445A1 Three-level word line decoder circuit for EEPROM |
| 03/15/2000 | EP0986064A2 Integrated semiconductor memory |
| 03/15/2000 | EP0986032A1 Seminconductor integrated circuit |
| 03/14/2000 | US6038637 Universal DRAM address multiplexer |
| 03/14/2000 | US6038634 Intra-unit block addressing system for memory |
| 03/14/2000 | US6038196 Semiconductor memory device having a synchronous DRAM |
| 03/14/2000 | US6038195 Synchronous memory device having a delay time register and method of operating same |
| 03/14/2000 | US6038192 Memory cells for field programmable memory array |
| 03/14/2000 | US6038178 High-voltage generator for word lines of a bank-activated semiconductor memory device |
| 03/14/2000 | US6037815 Pulse generating circuit having address transition detecting circuit |
| 03/14/2000 | US6036101 Electronic labeling systems and methods and electronic card systems and methods |
| 03/09/2000 | WO2000013185A2 Memory system |
| 03/09/2000 | DE19903197A1 Integrated memory with segmented word line |
| 03/07/2000 | US6035382 Circuit for receiving a command word for accessing a secure subkey |
| 03/07/2000 | US6035370 Method for modifying signals received by memory cards RAS signals as address lines |
| 03/07/2000 | US6035365 Dual clocked synchronous memory device having a delay time register and method of operating same |
| 03/07/2000 | US6034921 Method, apparatus, pager, and cellular telephone for accessing information from a memory unit utilizing a sequential select unit |
| 03/07/2000 | US6034920 Semiconductor memory device having a back gate voltage controlled delay circuit |
| 03/07/2000 | US6034918 Method of operating a memory having a variable data output length and a programmable register |
| 03/07/2000 | US6034913 Apparatus and method for high-speed wordline driving with low area overhead |
| 03/07/2000 | US6034911 Semiconductor memory device for a rapid random access |
| 03/07/2000 | US6034910 Semiconductor memory device to which serial access is made and a method for accessing the same |
| 03/07/2000 | US6034902 Solid-state memory device |
| 03/07/2000 | US6034897 Space management for managing high capacity nonvolatile memory |
| 03/07/2000 | US6034889 Electrically erasable and programmable non-volatile memory having a protectable zone and an electronic system including the memory |
| 03/07/2000 | US6033955 Method of making flexibly partitioned metal line segments for a simultaneous operation flash memory device with a flexible bank partition architecture |
| 03/02/2000 | DE19859516C1 Integrated circuit with decoder element |
| 03/02/2000 | DE19838813A1 Speichersystem Storage system |
| 02/29/2000 | US6032237 Non-volatile memory, memory card and information processing apparatus using the same and method for software write protect control of non-volatile memory |
| 02/29/2000 | US6032233 Storage array allowing for multiple, simultaneous write accesses |
| 02/29/2000 | US6032215 Synchronous memory device utilizing two external clocks |
| 02/29/2000 | US6032214 Method of operating a synchronous memory device having a variable data output length |
| 02/29/2000 | US6031786 Operation control circuits and methods for integrated circuit memory devices |
| 02/29/2000 | US6031784 Hierarchical decoding of a memory device |
| 02/29/2000 | US6031783 High speed video frame buffer |
| 02/29/2000 | US6031781 Semiconductor memory device allowing high-speed activation of internal circuit |
| 02/29/2000 | US6031779 Dynamic memory |
| 02/29/2000 | US6031768 Self boosted wordline |
| 02/24/2000 | WO2000010171A1 On-chip word line voltage generation for dram embedded in logic process |
| 02/23/2000 | CN1245338A Semiconductor memory |
| 02/22/2000 | US6028931 EPROM encryption code decoding prevention circuit for semiconductor memory device |
| 02/22/2000 | US6028815 Integrated memory |
| 02/22/2000 | US6028811 Architecture for high bandwidth wide I/O memory devices |
| 02/22/2000 | US6028810 Fast accessible dynamic type semiconductor memory device |
| 02/22/2000 | US6028808 Programmable logic array integrated circuits |
| 02/22/2000 | US6028801 High speed sensing of dual port static RAM cell |
| 02/22/2000 | US6028793 High voltage driver circuit for a decoding circuit in multilevel non-volatile memory devices |
| 02/22/2000 | US6028781 Selectable integrated circuit assembly and method of operation |
| 02/16/2000 | EP0980076A2 Memory activation devices and methods |
| 02/15/2000 | US6026466 Multiple row address strobe DRAM architecture to improve bandwidth |
| 02/15/2000 | US6026054 Memory device having a pipe counter |
| 02/15/2000 | US6026052 Programmable semiconductor memory device |
| 02/15/2000 | US6026051 Low skew differential receiver with disable feature |
| 02/15/2000 | US6026048 Synchronous random access memory |
| 02/15/2000 | US6026047 Integrated circuit memory device with hierarchical work line structure |
| 02/15/2000 | US6026046 Apparatus for decoding addresses |
| 02/15/2000 | US6026045 Semiconductor memory device having multibank |