Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 8 - Arrangements for selecting an address in a digital store
Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368)
01/1999
01/26/1999US5864247 Voltage detection circuit, power-on/off reset circuit, and semiconductor device
01/20/1999CN1205520A Semiconductor memory redundant circuit
01/19/1999US5862098 Word line driver circuit for semiconductor memory device
01/19/1999US5862092 Read bitline writer for fallthru in fifos
01/19/1999US5862090 Semiconductor memory device having cell array divided into a plurality of cell blocks
01/19/1999US5862080 Multi-state flash EEprom system with defect handling
01/19/1999CA2119200C Burst srams for use with a high speed clock
01/13/1999EP0890954A2 Single-ended read, dual-ended write SRAM cell
01/13/1999EP0890902A2 Redundancy circuit for semiconductor memory devide
01/13/1999EP0890174A1 Solid-state memory device
01/13/1999EP0890172A1 Solid-state memory device
01/12/1999US5860134 Memory system with memory presence and type detection using multiplexed memory line function
01/12/1999US5860128 Method for accessing a memory
01/12/1999US5859802 Integrated circuit memory devices having main and section row decoders for providing improved burst mode operation
01/12/1999US5859630 Bi-directional shift register
01/07/1999WO1999000797A2 Node-precise voltage regulation for a mos memory system
01/07/1999EP0889481A1 Improvements of sequential access memories
01/07/1999DE19821581A1 Memory matrix which allows multiple simultaneous writing access with write-through
01/05/1999US5856952 Integrated circuit memory devices including a plurality of row latch circuits and related methods
01/05/1999US5856940 Low latency DRAM cell and method therefor
01/05/1999US5856937 Processor module with dual-bank SRAM cache having shared capacitors and R-C elements integrated into the module substrate
12/1998
12/30/1998EP0887802A2 Method for operating a memory
12/29/1998US5854772 Decoder circuit with less transistor elements
12/29/1998US5854770 Decoding hierarchical architecture for high integration memories
12/29/1998US5854769 For a semiconductor memory device
12/29/1998US5854763 For implementing a memory device
12/24/1998DE19742702A1 Address junction detecting circuit for address junction signal generation
12/23/1998EP0886279A2 Address decoder, simiconductor memory and semiconductor device
12/22/1998US5852585 Addressing unit
12/22/1998US5852583 Semiconductor memory device that can realize high speed data read out
12/22/1998US5852576 High voltage NMOS pass gate for integrated circuit with high voltage generator and flash non-volatile memory device having the pass gate
12/17/1998WO1998057241A1 Method and apparatus for audibly indicating when a predetermined location has been encountered in stored data
12/17/1998DE19823485A1 Device for fixing address signal changes in solid state memory
12/16/1998EP0884732A2 Timing signal generating circuit, semiconductor integrated circuit device and semiconductor integrated circuit system to which the timing signal generating circuit is applied, and signal transmission system
12/16/1998CN1041250C 半导体存储装置 The semiconductor memory device
12/15/1998US5850450 Method and apparatus for encryption key creation
12/15/1998US5850368 Burst EDO memory address counter
12/10/1998WO1998056004A1 Semiconductor memory device
12/08/1998US5848024 Clock controlled column decoder
12/08/1998US5848023 Semiconductor memory device operable in burst mode and method of controlling the same
12/08/1998US5848022 Address enable circuit in synchronous SRAM
12/08/1998US5848020 Semiconductor memory and method of using the same, column decoder, and image processor
12/08/1998US5848019 Pass gate decoder for a multiport memory dEvice that uses a single ported memory cell array structure
12/08/1998US5848018 Memory-row selector having a test function
12/08/1998US5848013 Row decoding circuit for semiconductor non-volatile electrically programmable memory and corresponding method
12/08/1998US5848006 Redundant semiconductor memory device using a single now address decoder for driving both sub-wordlines and redundant sub-wordlines
12/08/1998US5848005 Programmable logic array integrated circuits
12/08/1998US5848004 Semiconductor memory device
12/08/1998US5848000 Flash memory address decoder with novel latch structure
12/08/1998US5847998 Non-volatile memory array that enables simultaneous read and write operations
12/08/1998US5847985 Memory modules
12/02/1998EP0840928A4 An integrated circuit having enable control circuitry
12/02/1998EP0829086A4 Technique for reconfiguring a high density memory
12/01/1998USRE35978 Control circuit of dynamic random access memory
12/01/1998US5845332 Non-volatile memory, memory card and information processing apparatus using the same and method for software write protect control of non-volatile memory
12/01/1998US5845315 Computer system
12/01/1998US5844857 Row address control circuits having a predecoding address sampling pulse generator and methods for memory devices
12/01/1998US5844854 Programmable logic device with two dimensional memory addressing
12/01/1998US5844849 Dynamic semiconductor memory device having fast operation mode and operating with low current consumption
12/01/1998US5844840 High voltage NMOS pass gate having supply range, area, and speed advantages
11/1998
11/24/1998US5842169 Read/write control method and circuit for a sound recording/reproducing device
11/24/1998US5841740 Apparatus for recording and reproducing information data using recording region data for reproduction with audio and video data
11/24/1998US5841729 Semiconductor memory device in which data are read and written asynchronously with application of address signal
11/24/1998US5841728 Hierarchic memory device having auxiliary lines connected to word lines
11/24/1998US5841727 Semiconductor memory device
11/24/1998US5841720 Memory array
11/24/1998US5841715 Integrated circuit I/O using high performance bus interface
11/24/1998US5841712 Dual comparator circuit and method for selecting between normal and redundant decode logic in a semiconductor memory device
11/24/1998US5841707 Apparatus and method for a programmable interval timing generator in a semiconductor memory
11/24/1998US5841706 Semiconductor memory device capable of high speed operation in low power supply voltage
11/24/1998US5841696 Non-volatile memory enabling simultaneous reading and writing by time multiplexing a decode path
11/24/1998US5841688 Matched delay word line strap
11/24/1998US5841687 Method to synchronize encoding and decoding frequencies
11/24/1998US5841686 Dual-bank memory module with shared capacitors and R-C elements integrated into the module substrate
11/24/1998US5841580 Memory device
11/17/1998US5838902 Copy protection circuit for a data in a memory
11/17/1998US5838629 Dynamic random access memory device
11/17/1998US5838628 In a two-dimensional array
11/17/1998US5838622 In a memory
11/17/1998US5838613 Semiconductor memory device having security function
11/17/1998US5838609 Integrated semiconductor device having negative resistance formed of MIS switching diode
11/17/1998US5838256 Electronic key with three modes of automatic self-disablement
11/11/1998EP0877384A2 Semiconductor memory device
11/11/1998EP0877383A2 Semiconductor memory device
11/11/1998EP0877382A2 Semiconductor memory device
11/11/1998EP0877381A2 Semiconductor memory device
11/11/1998EP0876708A1 An address transition detection circuit
11/11/1998EP0655164B1 Self-testing device for storage arrangements, decoders or the like
11/11/1998EP0621537B1 Structure to recover a portion of a partially functional embedded memory
11/11/1998CN1198834A Integrated circuit for storage and retrieval of multiple digital bits per nonvolatile memory cell
11/10/1998USRE35953 Semiconductor dynamic memory device
11/10/1998US5835966 Semiconductor memory device and memory access system using a four-state address signal
11/10/1998US5835932 Methods and systems for maintaining data locality in a multiple memory bank system having DRAM with integral SRAM
11/10/1998US5835445 Semiconductor integrated circuit device having a synchronous output function with a plurality of external clocks
11/10/1998US5835441 Synchronous memory device
11/10/1998US5835440 Memory device equilibration circuit and method
11/10/1998US5835439 Sub word line driving circuit and a semiconductor memory device using the same
11/10/1998US5835438 Precharge-enable self boosting word line driver for an embedded DRAM
11/10/1998US5835436 Dynamic type semiconductor memory device capable of transferring data between array blocks at high speed
11/10/1998US5835435 Method and apparatus for dynamically placing portions of a memory in a reduced power consumtion state
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