| Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368) |
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| 05/19/1998 | US5754886 Controller for supplying multiplexed or non-multiplexed address signals to different types of dynamic random access memories |
| 05/19/1998 | US5754834 Programmable RAS/CAS generation circuit |
| 05/19/1998 | US5754816 Data storage apparatus and method with two stage reading |
| 05/19/1998 | US5754489 Serial access memory apparatus |
| 05/19/1998 | US5754485 Dual port memory apparatus operating a low voltage to maintain low operating current during charging and discharging |
| 05/19/1998 | US5754465 No physical movement component record reproduce device and flat display device |
| 05/19/1998 | US5754075 Integrated circuits including power supply boosters and methods of operating same |
| 05/14/1998 | WO1998020495A1 Staggered row line firing in a single ras cycle |
| 05/13/1998 | EP0841751A1 Delay circuit |
| 05/13/1998 | EP0840928A1 An integrated circuit having enable control circuitry |
| 05/13/1998 | CN1181595A Semiconductor memory |
| 05/12/1998 | US5752270 Method of executing read and write operations in a synchronous random access memory |
| 05/12/1998 | US5751742 Serially accessible memory means with high error correctability |
| 05/12/1998 | US5751657 Semiconductor memory device |
| 05/12/1998 | US5751656 Synchronous DRAM memory with asynchronous column decode |
| 05/12/1998 | US5751651 Semiconductor integrated circuit device having a hierarchical power source configuration |
| 05/12/1998 | US5751645 Semiconductor memory device with reduced output noise |
| 05/12/1998 | US5751643 Dynamic memory word line driver |
| 05/12/1998 | US5751638 Mail-box design for non-blocking communication across ports of a multi-port device |
| 05/07/1998 | WO1998002886A3 Memory with fast decoding |
| 05/07/1998 | DE19748023A1 Line decoder for semiconductor memory, generating output signal |
| 05/06/1998 | EP0840448A2 A setup/hold time delay network |
| 05/06/1998 | EP0840203A2 Semiconductor FIFO memory |
| 05/06/1998 | EP0839375A2 Pipelined address memories, and systems and methods using the same |
| 05/06/1998 | EP0839344A1 Microcircuit with memory that is protected by both hardware and software |
| 05/06/1998 | CN1180900A Two port memory for simultaneously inputting and outputting data |
| 05/05/1998 | US5748914 Protocol for communication with dynamic memory |
| 05/05/1998 | US5748561 Semiconductor memory device with fast successive read operation |
| 05/05/1998 | US5748559 Circuit for high speed serial programming of programmable logic devices |
| 05/05/1998 | US5748558 Semiconductor memory device |
| 05/05/1998 | US5748557 Address buffer for high-speed address inputting |
| 05/05/1998 | US5748554 Memory and method for sensing sub-groups of memory elements |
| 05/05/1998 | US5748547 High performance semiconductor memory devices having multiple dimension bit lines |
| 05/05/1998 | US5748542 Circuit and method for providing a substantially constant time delay over a range of supply voltages |
| 05/05/1998 | US5748538 OR-plane memory cell array for flash memory with bit-based write capability, and methods for programming and erasing the memory cell array |
| 05/05/1998 | US5748528 EEPROM memory device with simultaneous read and write sector capabilities |
| 05/05/1998 | US5748520 Semiconductor memory device having minimal leakage current |
| 04/28/1998 | US5745914 Technique for converting system signals from one address configuration to a different address configuration |
| 04/28/1998 | US5745431 Address transition detector (ATD) for power conservation |
| 04/28/1998 | US5745429 Memory having and method for providing a reduced access time |
| 04/28/1998 | US5745428 Dynamic random access memory device |
| 04/28/1998 | US5745409 Non-volatile memory with analog and digital interface and storage |
| 04/22/1998 | EP0837474A2 Memory cells matrix for a semiconductor integrated microcontroller |
| 04/21/1998 | US5742558 Semiconductor memory device for plurality of ranges of power supply voltage |
| 04/21/1998 | US5742557 Multi-port random access memory |
| 04/21/1998 | US5742546 Method and device for address decoding in an integrated circuit memory |
| 04/21/1998 | US5742539 Integrated circuit for content addressable memory |
| 04/21/1998 | US5742197 Boosting voltage level detector for a semiconductor memory device |
| 04/16/1998 | WO1998015959A1 Flash memory with divided bitline |
| 04/15/1998 | CN1179233A Method of driving field effect transistor |
| 04/14/1998 | US5740122 Semiconductor memory device |
| 04/14/1998 | US5740119 Semiconductor memory device having internal address converting function, whose test and layout are conducted easily |
| 04/14/1998 | US5740108 Series-structured read-only memory having word lines arranged independently for each row of a memory cell array |
| 04/14/1998 | US5740107 Nonvolatile integrated circuit memories having separate read/write paths |
| 04/14/1998 | US5740098 Using one memory to supply addresses to an associated memory during testing |
| 04/09/1998 | WO1998015058A1 Self-timed pulse control circuit |
| 04/09/1998 | WO1998014956A1 Memory array, memory cell, and sense amplifier test and characterization |
| 04/09/1998 | WO1998014955A1 Data retention test for static memory cell |
| 04/09/1998 | WO1998014950A1 Memory block select using multiple word lines to address a single memory cell row |
| 04/09/1998 | WO1998014949A1 Dram |
| 04/09/1998 | WO1998014947A1 Memory including resistor bit-line loads |
| 04/09/1998 | WO1998014944A1 Active power supply filter |
| 04/09/1998 | WO1998014883A1 A method and apparatus for sampling data from a memory |
| 04/08/1998 | EP0834881A1 A multi-block memory |
| 04/07/1998 | US5737768 In a computer |
| 04/07/1998 | US5737765 Electronic system with circuitry for selectively enabling access to configuration registers used by a memory controller |
| 04/07/1998 | US5737764 Generation of memory column addresses using memory array type bits in a control register of a computer system |
| 04/07/1998 | US5737748 Microprocessor unit having a first level write-through cache memory and a smaller second-level write-back cache memory |
| 04/07/1998 | US5737637 System for control of data I/O transfer based on cycle count in a semiconductor memory device |
| 04/07/1998 | US5737570 For use with a computer |
| 04/07/1998 | US5737566 Data processing system having a memory with both a high speed operating mode and a low power operating mode and method therefor |
| 04/07/1998 | US5737563 Determination of memory bank sizes in a computer system |
| 04/07/1998 | US5737275 Word line selection circuit for static random access memory |
| 04/07/1998 | US5737271 Semiconductor memory arrays |
| 04/07/1998 | US5737270 For decoding an input signal |
| 04/07/1998 | US5737267 Word line driver circuit |
| 04/07/1998 | US5737262 Method and apparatus for avoiding back-to-back data rewrites to a memory array |
| 04/07/1998 | US5736724 Oblique access to image data for reading dataforms |
| 04/02/1998 | WO1997014289A3 Protocol for communication with dynamic memory |
| 04/01/1998 | EP0833343A2 A NOR gate applied to a sub-decoder of a semiconductor memory |
| 04/01/1998 | EP0832486A1 Nonvolatile memory blocking architecture and redundancy |
| 03/31/1998 | US5734619 Semiconductor memory device having cell array divided into a plurality of cell blocks |
| 03/31/1998 | US5734613 Multi-port random access memory |
| 03/31/1998 | US5734608 Residual charge elimination for a memory device |
| 03/31/1998 | US5734282 Address transition detection circuit |
| 03/31/1998 | US5733807 Method of fabricating a semiconductor memory having an address decoder |
| 03/26/1998 | DE19733396A1 Word line driver circuit for semiconducting memory component |
| 03/25/1998 | EP0831590A1 Output buffer for logic signals |
| 03/25/1998 | EP0831494A2 Decode circuit for use in semiconductor memory device |
| 03/25/1998 | EP0831402A1 Dynamically configuring timing to match memory bus loading conditions |
| 03/25/1998 | EP0830682A1 Auto-activate on synchronous dynamic random access memory |
| 03/24/1998 | USRE35750 Wordline driver circuit having an automatic precharge circuit |
| 03/24/1998 | US5732035 Very large scale integrated planar read only memory |
| 03/24/1998 | US5732034 Semiconductor memory device having an address key circuit for reducing power consumption |
| 03/24/1998 | US5732022 Non-volatile semiconductor memory device |
| 03/24/1998 | US5732013 Matrix memory (virtual ground) |
| 03/18/1998 | EP0829881A2 Wordline drive circuit for flash EEPROM memory |
| 03/18/1998 | EP0829095A1 Method and apparatus for reducing latency time on an interface by overlapping transmitted packets |
| 03/18/1998 | EP0829087A1 Process for the selective programming of a non-volatile store |
| 03/18/1998 | EP0829086A1 Technique for reconfiguring a high density memory |