Patents
Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368)
08/2000
08/08/2000CA2186312C Ink jet print head identification circuit with serial out, dynamic shift registers
08/03/2000DE19927878A1 Semiconducting memory element with address decoder has internal signal generator that activates internal main signal and trigger signal in response to activation of external main signal
08/01/2000US6098145 Pulsed Y-decoders for improving bitline precharging in memories
08/01/2000US6097666 Nonvolatile semiconductor memory device whose addresses are selected in a multiple access
08/01/2000US6097664 Multi-port SRAM cell array having plural write paths including for writing through addressable port and through serial boundary scan
08/01/2000US6097663 Semiconductor IC device having a memory and a logic circuit implemented with a single chip
08/01/2000US6097661 Pointer circuit with low surface requirement high speed and low power loss
08/01/2000US6097660 Semiconductor memory device
08/01/2000US6097627 Quantum random address memory with nano-diode mixer
07/2000
07/26/2000EP1022642A1 Integrated circuit I/O using a high performance bus interface
07/26/2000EP1022641A1 Integrated circuit i/o using a high performance bus interface
07/25/2000US6094724 Secure memory having anti-wire tapping
07/25/2000US6094704 Memory device with pipelined address path
07/25/2000US6094701 Semiconductor memory device
07/25/2000US6094697 Information processing system including processing device for detecting non-conductivity of state-indicating non-conductive member and discriminating prohibit state of writing information to information writable storage medium
07/25/2000US6094397 Method and apparatus for addressing multi-bank memory
07/25/2000US6094383 Programmable non-volatile memory device and method of programming the same
07/25/2000US6094379 Memory reading circuit and SRAM
07/25/2000US6094073 Line decoder for memory devices
07/19/2000EP1020868A1 Semiconductor integrated circuit device
07/18/2000US6092082 Digital audio recorder and player with address backup function
07/18/2000US6091665 Synchronous random access memory having column factor counter for both serial and interleave counting
07/18/2000US6091660 Semiconductor integrated circuit device
07/18/2000US6091659 Synchronous semiconductor memory device with multi-bank configuration
07/18/2000US6091656 Semiconductor integrated circuit device having a hierarchical power source configuration
07/18/2000US6091645 Programmable read ports and write ports for I/O buses in a field programmable memory array
07/18/2000US6091627 Message box memory cell for two-side asynchronous access
07/18/2000US6091622 Nonvolatile ferroelectric memory device
07/13/2000WO2000017757A3 Redundant form address decoder for memory system
07/12/2000CN1260056A 访问控制系统 Access Control System
07/12/2000CN1054457C Memory storage for semiconductor and mfg. method thereof
07/11/2000US6088293 Low-power column decode circuit
07/11/2000US6088292 Semiconductor memory device having a plurality of banks activated by a common timing control circuit
07/11/2000US6088291 Semiconductor memory device
07/11/2000US6088289 Circuit and method for controlling a wordline and/or stabilizing a memory cell
07/11/2000US6088287 Flash memory architecture employing three layer metal interconnect for word line decoding
07/11/2000US6088279 Semiconductor memory device with dummy word line
07/11/2000US6088276 Semiconductor device provided with a circuit performing fast data reading with a low power consumption
07/11/2000US6088267 Nonvolatile semiconductor memory device having row decoder
07/11/2000US6088252 Semiconductor storage device with an improved arrangement of electrodes and peripheral circuits to improve operational speed and integration
07/06/2000WO2000039804A1 System for dual buffering of asynchronous input to dual port memory for a raster scanned display
07/06/2000WO2000039803A1 Dual-port memory system for buffering asynchronous input to a raster scanned display
07/04/2000US6085284 Method of operating a memory device having a variable data output length and an identification register
07/04/2000US6085280 Parallel-access memory and method
07/04/2000US6084821 Semiconductor storage device having a divided word line structure
07/04/2000US6084820 Dual port memory device with vertical shielding
07/04/2000US6084819 Multi-bank memory with word-line banking
07/04/2000US6084818 Semiconductor memory device capable of efficient memory cell select operation with reduced element count
07/04/2000US6084804 Memory row driver with parasitic diode pull-down function
06/2000
06/28/2000EP1014380A1 Self boosted wordline
06/28/2000EP1014379A1 Integrated circuit with decoder element
06/27/2000US6081474 Semiconductor memory
06/27/2000US6081460 Integrated circuit devices having voltage level responsive mode-selection circuits therein and methods of operating same
06/27/2000US6081455 EEPROM decoder block having a p-well coupled to a charge pump for charging the p-well and method of programming with the EEPROM decoder block
06/27/2000US6081452 Semiconductor storage device capable of accurately collectively executing erase verify operation on all memory cells
06/27/2000US6081450 Non-volatile semiconductor memory device in which read, write and erase operations can be simultaneously performed in different memory cell array blocks
06/27/2000US6081447 Wear leveling techniques for flash EEPROM systems
06/21/2000EP1010331A1 Method of and apparatus for transmitting data for interactive tv applications
06/21/2000EP1010320A1 Broadcast receiving system comprising a computer and a decoder
06/21/2000EP1010068A1 Downloading a computer file from a transmitter via a receiver/decoder to a computer
06/21/2000DE19952011A1 Adressentaktsignalgenerator für Speichergerät Address clock signal generator for storage device
06/21/2000CN1257630A Broadcast receiving system composed of computer and decoder
06/20/2000US6079023 Multi-bank memory devices having common standby voltage generator for powering a plurality of memory array banks in response to memory array bank enable signals
06/20/2000US6078986 Processor system using synchronous dynamic memory
06/20/2000US6078637 Address counter test mode for memory device
06/20/2000US6078547 Method and structure for controlling operation of a DRAM array
06/20/2000US6078545 Data transfer circuit
06/20/2000US6078544 Multi-port SRAM
06/20/2000US6078543 Refresh scheme for redundant word lines
06/20/2000US6078542 Semiconductor memory device implementing multi-bank configuration with reduced number of signal lines
06/20/2000US6078531 Word line voltage supply circuit
06/20/2000US6078527 Pipelined dual port integrated circuit memory
06/20/2000US6078526 Flash memory with plural memory chips of same memory capacity and system utilizing the same
06/20/2000US6078515 Memory system with multiple addressing and control busses
06/15/2000WO2000034956A1 Enhanced word line driver to reduce gate capacitance for low voltage applications
06/15/2000DE19906200A1 Halbleiterspeichervorrichtung mit einer Subwortleitung-Ansteuerschaltung A semiconductor memory device with a sub-word line driver circuit
06/14/2000CN1256784A Memory device and method
06/13/2000US6076136 RAM address decoding system and method to support misaligned memory access
06/13/2000US6075751 Signal transition detector for asynchronous circuits
06/13/2000US6075750 Method and circuit for generating an ATD signal to regulate the access to a non-volatile memory
06/13/2000US6075747 Method of controlling a row address strobe path
06/13/2000US6075746 DRAM device with function of producing wordline drive signal based on stored charge in capacitor
06/13/2000US6075745 Field programmable memory array
06/13/2000US6075744 Dram core refresh with reduced spike current
06/13/2000US6075720 Memory cell for DRAM embedded in logic
06/08/2000WO2000033315A1 Apparatus and method for optimizing die utilization and speed performance by register file splitting
06/08/2000WO2000033314A1 Integrated electric and/or electronic system with means for insulating a functional module, corresponding device and method for insulation and use
06/07/2000EP1006435A1 A memory operated in a modified ping-pong mode
06/07/2000EP0890172B1 Solid-state memory device
06/06/2000US6072746 Self-timed address decoder for register file and compare circuit of a multi-port CAM
06/06/2000US6072743 High speed operable semiconductor memory device with memory blocks arranged about the center
06/06/2000US6072719 Semiconductor memory device
06/03/2000CA2287034A1 A memory operated in a modified ping-pong mode
06/02/2000WO2000031871A1 Improved flip-flops and other logic circuits and techniques for improving layouts of integrated circuits
06/02/2000WO2000031745A1 Ampic dram
06/02/2000WO2000031729A2 A digital memory structure and device, and methods for the management thereof
06/02/2000WO2000031646A2 Data processor integrated circuit with a memory interface unit with programmable strobes to select different memory devices
06/02/2000WO2000013185A3 Memory system
06/02/2000CA2352342A1 A digital memory structure and device, and methods for the management thereof
06/02/2000CA2351656A1 Ampic dram