Patents
Patents for G11C 8 - Arrangements for selecting an address in a digital store (19,368)
04/1999
04/14/1999EP0908891A2 Circuit for processing access conflicts
04/14/1999EP0908886A2 Semiconductor integrated circuit device
04/14/1999EP0803124B1 A dual bank memory and systems using the same
04/14/1999EP0677849B1 Multiple I/O select memory
04/13/1999US5894449 Equalization signal generator for semiconductor memory device
04/13/1999US5894432 CMOS memory cell with improved read port
04/08/1999DE19743666A1 Subdivision of memory capacity in car radio system
04/07/1999EP0907183A2 Semiconductor integrated circuit device
04/07/1999CN1213140A Indicator circuit with small placeholder, high speed and low power dissipation
04/07/1999CN1213139A Apparatus and method for high-speed wordline driving with low area overheat
04/06/1999US5893167 Data transfer control of a video memory having a multi-divisional random access memory and a multi-divisional serial access
04/06/1999US5893158 Multibank dram system controlled by multiple dram controllers with an active bank detector
04/06/1999US5892920 Data transmission system buffer with tree shaped multiplexer controlled by different sending and receiving clock speeds
04/06/1999US5892729 Power savings for memory arrays
04/06/1999US5892728 Column decoder configuration for a 1T/1C ferroelectric memory
04/06/1999US5892727 Word line driver in a multi-value mask ROM
04/06/1999US5892726 Address decoder
04/06/1999US5892704 Wordline amplifier
03/1999
03/31/1999EP0905706A2 Pointer circuit with reduced surface, high speed and low power dissipation
03/31/1999EP0905705A2 Space-efficient semiconductor memory having hierarchical column select line architecture
03/31/1999EP0905704A1 Sectored semiconductor memory device with configurable memory sector addresses
03/31/1999CN1212431A Semiconductor integrated circuit device
03/30/1999US5890195 Dram with integral sram comprising a plurality of sets of address latches each associated with one of a plurality of sram
03/30/1999US5890194 Method for efficient use of DRAM data and parity areas
03/30/1999US5890192 Concurrent write of multiple chunks of data into multiple subarrays of flash EEPROM
03/30/1999US5889725 Decoder circuit for a semiconductor memory device
03/30/1999US5889724 Word line driving circuit for semiconductor memory device and method
03/30/1999US5889714 Adaptive precharge management for synchronous DRAM
03/30/1999US5889695 Nonvolatile semiconductor memory device reduced in occupy area of memory cell
03/30/1999US5889694 Dual-addressed rectifier storage device
03/25/1999WO1999000797A3 Node-precise voltage regulation for a mos memory system
03/24/1999EP0903747A2 Apparatus and method for high-speed wordline driving with low area overhead
03/24/1999CN1211801A Semiconductor memory
03/24/1999CN1211798A Semiconductor integrated circuit device
03/23/1999US5886949 Method and circuit for generating a synchronizing ATD signal
03/23/1999US5886944 Memory device having page copy mode
03/23/1999US5886942 Word line driver and semiconductor device
03/23/1999US5886941 Address decoder and address decoding method
03/23/1999US5886940 Self-protected circuit for non-selected programmable elements during programming
03/23/1999US5886933 Boost voltage generator for controlling a memory cell array
03/23/1999US5886929 High speed addressing buffer and methods for implementing same
03/23/1999US5886919 Multi-port semiconductor memory device with reduced coupling noise
03/23/1999US5886918 Semiconductor integrated circuit device having synchronous function with a plurality of external clocks
03/23/1999US5886553 Semiconductor device having a latch circuit for latching data externally input
03/18/1999WO1999013473A1 Distributed balanced address detection and clock buffer circuitry and methods for making the same
03/18/1999DE19804186A1 Arrangement to address one of several internal banks of data memory
03/18/1999DE19740694A1 Access conflict management circuit for multi-port memory
03/16/1999US5883854 Distributed balanced address detection and clock buffer circuitry and methods for making the same
03/16/1999US5883852 Configurable SRAM for field programmable gate array
03/16/1999US5883851 Semiconductor memory device and a reading method thereof
03/16/1999US5883850 Programmable logic array integrated circuits
03/16/1999US5883839 Waveform stabilizing drive circuit for modularized memory
03/16/1999US5883826 Memory block select using multiple word lines to address a single memory cell row
03/16/1999US5883538 Low-to-high voltage CMOS driver circuit for driving capacitive loads
03/11/1999WO1999012169A1 Non-volatile store with cells assembled in sub-blocks
03/10/1999CN1210342A Multi-bank synchronous semiconductor memory device
03/10/1999CN1210341A Semiconductor memory device with control for auxiliary word lines for memory cell selection
03/09/1999US5881128 Technique for preventing data stored in a memory of telephone system from being corrupted during power failure
03/09/1999US5881006 Semiconductor memory device
03/09/1999US5880997 Bubbleback for FIFOS
03/09/1999US5880995 Nonvolatile semiconductor storage including main decoder with predecoder
03/09/1999US5880990 Dual port memory apparatus operating a low voltage to maintain low operating current during charging and discharging
03/04/1999WO1999010892A1 Low voltage and low power static random access memory (sram)
03/04/1999DE19821215A1 Access control of multiple memory semiconductor memory
03/03/1999CN1209629A Multi-storage-body synchronous semiconductor storage device
03/02/1999US5877989 Semiconductor memory device
03/02/1999US5877986 Multi-state Flash EEprom system on a card that includes defective cell substitution
03/02/1999US5877983 Method for selective programming of a non-volatile memory
03/02/1999US5877976 Memory system having a vertical bitline topology and method therefor
03/02/1999US5877651 Semiconductor memory device that can have power consumption reduced
02/1999
02/25/1999WO1999009560A1 A low latency dram cell and method therefor
02/24/1999CN1208932A Semiconductor memory device
02/23/1999US5875486 Semiconductor memory device with clock timing to activate memory cells for subsequent access
02/23/1999US5875470 Semiconductor memory chip
02/23/1999US5875152 Address transition detection circuit for a semiconductor memory capable of detecting narrowly spaced address changes
02/23/1999US5875150 Micropower read-only-memory integrated circuit
02/23/1999US5875149 Word line driver for semiconductor memories
02/23/1999US5875148 Semiconductor memory
02/23/1999US5875133 Semiconductor memory device and a method for stepping up its word lines
02/23/1999US5875121 Register selection system and method
02/17/1999CN1208231A Synchronous-type semiconductor storage
02/16/1999US5872737 Semiconductor integrated circuit device in which influence of power supply noise on internal circuitry during operation of input/output buffer is prevented
02/16/1999US5872712 Method and apparatus for audibly indicating when a predetermined location has been encountered in stored data
02/09/1999USRE36089 Column selecting circuit in semiconductor memory device
02/09/1999US5870574 System and method for fetching multiple groups of instructions from an instruction cache in a RISC processor system for execution during separate cycles
02/09/1999US5870347 Multi-bank memory input/output line selection
02/09/1999US5870346 VLSI memory circuit
02/09/1999US5870325 Memory system with multiple addressing and control busses
02/09/1999US5870324 Contents-addressable memory
02/03/1999EP0895160A1 Semiconductor memory with select line clamping circuit for preventing malfunction
02/02/1999US5867449 Circuit for tracking a wordline signal used in an integrated circuit
02/02/1999US5867446 Synchronous semiconductor memory device
02/02/1999US5867445 Local word line decoder for memory with 2 MOS devices
02/02/1999US5867444 Programmable memory device that supports multiple operational modes
02/02/1999US5867439 Semiconductor memory device having internal address converting function, whose test and layout are conducted easily
02/02/1999US5867431 Memory device and method of controlling the same
01/1999
01/27/1999EP0892972A1 High-speed video frame buffer using single port memory chips where pixel intensity values for display regions are stored at consecutive addresses of memory blocks
01/26/1999US5864872 Single wire communication system
01/26/1999US5864512 High-speed video frame buffer using single port memory chips
01/26/1999US5864507 Dual level wordline clamp for reduced memory cell current