Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
09/2005
09/08/2005US20050195670 Semiconductor memory apparatus and method for operating a semiconductor memory apparatus
09/08/2005US20050195669 Memory device that recycles a signal charge
09/08/2005US20050195664 Semiconductor device saving data in non-volatile manner during standby
09/08/2005US20050195663 Delay locked loop in semiconductor memory device
09/08/2005US20050195662 Non-volatile memory device conducting comparison operation
09/08/2005US20050195658 Magnetoresistive random access memory with high current density
09/08/2005US20050195657 Bit switch voltage drop compensation during programming in nonvolatile memory
09/08/2005US20050195656 Overerase correction in flash EEPROM memory
09/08/2005US20050195654 Electrically word-erasable non-volatile memory device, and biasing method thereof
09/08/2005US20050195653 Novel method and structure for efficient data verification operation for non-volatile memories
09/08/2005US20050195650 Method for operating an electrical writable and erasable memory cell and a memory device for electrical memories
09/08/2005US20050195649 Multi-bit MRAM device with switching nucleation sites
09/08/2005US20050195648 Method and apparatus for testing tunnel magnetoresistive effect element
09/08/2005US20050195647 1R1D MRAM block architecture
09/08/2005US20050195646 MRAM array employing spin-filtering element connected by spin-hold element to MRAM cell structure for enhanced magnetoresistance
09/08/2005US20050195645 Readout circuit with gain and analog-to-digital conversion for image sensor
09/08/2005US20050195644 Magnetoresistive random access memory and driving method thereof
09/08/2005US20050195643 Differential and quadrature harmonic VCO and methods therefor
09/08/2005US20050195642 Ternary bit line signaling
09/08/2005US20050195641 Memory system and associated methodology
09/08/2005US20050195639 Semiconductor memory
09/08/2005US20050195638 Integrated semiconductor memory device and method for operating an integrated semiconductor memory device
09/08/2005US20050195637 Biasing structure for accessing semiconductor memory cell storage elements
09/08/2005US20050195636 Semiconductor memory device with a stacked gate including a floating gate and a control gate
09/08/2005US20050195634 Memory device
09/08/2005US20050195632 Non-volatile memory with a single transistor and resistive memory element
09/08/2005US20050195631 Method and apparatus for storing and reading information in a ferroelectric material
09/08/2005US20050195628 Semiconductor memory device
09/08/2005US20050195019 Booster circuit and semiconductor device having same
09/08/2005US20050195008 Hybrid latch flip-flop
09/08/2005US20050195007 Hybrid latch flip-flop
09/08/2005US20050195004 Delay locked loop in semiconductor memory device and its clock locking method
09/08/2005US20050195001 Circuit arrangement for production of a reset signal after a supply has fallen and risen again
09/08/2005US20050194988 Semiconductor device
09/08/2005US20050194915 Driver circuit for driving a light source of an optical pointing device
09/08/2005US20050194614 Integrated semiconductor memory and method for electrically stressing an integrated semiconductor memory
09/08/2005DE19960247B4 Datenspeicher und Verfahren Data storage and method
09/08/2005DE102005002526A1 Wärmeunterstützte Magnetspeichervorrichtung mit gesteuerter Temperatur Heat-assisted magnetic memory device with controlled temperature
09/08/2005DE102005001847A1 Synchronous dynamic RAM device, has pull-type termination unit coupled to data pin to receive data signal with frequency component higher than that of open drain type unit coupled to control pin to receive control signal
09/08/2005DE102004009428A1 Method for communicating between integrated circuit and external dynamic RAM, involves prioritizing transmission of memory bank commands based on static priority allocation for commands and dynamic priority allocation for channels
09/08/2005DE102004008245B3 Integrierter Halbleiterspeicher und Verfahren zum elektrischen Stressen eines integrierten Halbleiterspeichers Integrated semiconductor memory and method for electrically stressing a semiconductor integrated circuit memory
09/08/2005DE102004007633A1 Speicherbauelement-Elektrode mit Oberflächen-Struktur Memory device with electrode surface structure
09/07/2005EP1571713A1 Spin injection device, magnetic device using the same, magnetic thin film used in the same
09/07/2005EP1571710A1 Ferroelectric capacitor and its manufacturing method
09/07/2005EP1571674A2 Method for operating an electrically erasable and programmable memory cell and corresponding memory device
09/07/2005EP1571673A2 Memory device
09/07/2005EP1570487A2 Architecture for high-speed magnetic memories
09/07/2005EP1446840A4 Multi-state non-volatile integrated circuit memory systems that employ dielectric storage elements
09/07/2005EP1434232A4 Memory cell
09/07/2005EP1155462B1 Storage cell arrangement and method for producing the same
09/07/2005CN1666293A Ferroelectric memory
09/07/2005CN1666292A Circuit and method of writing a toggle memory
09/07/2005CN1666291A Wordline latching in semiconductor memories
09/07/2005CN1666290A Methods and apparatus for delay circuit
09/07/2005CN1666289A Balanced load memory and method of operation
09/07/2005CN1666172A Methods of computing with digital multistate phase change materials
09/07/2005CN1665135A Delay signal generator circuit and memory system including the same
09/07/2005CN1665030A 3d rram
09/07/2005CN1665019A Method for operating electric writeable-eraseable memory unit and apparatus for electric memory
09/07/2005CN1664957A Memory device
09/07/2005CN1664956A Delay locked loop in semiconductor memory device and its clock locking method
09/07/2005CN1664955A Combination field programmable gate array allowing dynamic reprogrammability and non-volatile programmability based upon transistor gate oxide breakdown
09/07/2005CN1664954A Semiconductor device
09/07/2005CN1664952A Integrate circuit
09/07/2005CN1664903A Mixed latch trigger
09/07/2005CN1664680A Thin film transistor array panel for display
09/07/2005CN1218396C Semiconductor memory
09/07/2005CN1218384C Self-aligned, programmable phase change memory and method for manufacturing the same
09/07/2005CN1218324C Register and signal generating method suitable for wide band
09/06/2005US6941416 Apparatus and methods for dedicated command port in memory controllers
09/06/2005US6941415 DRAM with hidden refresh
09/06/2005US6941414 High speed embedded DRAM with SRAM-like interface
09/06/2005US6941413 Nonvolatile memory, its data updating method, and card reader equipped with such nonvolatile memory
09/06/2005US6941411 Non-contiguous address erasable blocks and command in flash memory
09/06/2005US6940812 Apparatus and method for transmitting constant bit rate data cells, controlling transmission of data cells to prevent head data cells from being sent out through the continuous slots of the transmission cycle
09/06/2005US6940782 Memory system and control method for the same
09/06/2005US6940778 System and method for reducing leakage in memory cells using wordline control
09/06/2005US6940775 Integrated dynamic memory having a control circuit for controlling a refresh mode for memory cells
09/06/2005US6940773 Method and system for manufacturing DRAMs with reduced self-refresh current requirements
09/06/2005US6940767 Semiconductor memory device having a plurality of signal lines for writing and reading data
09/06/2005US6940763 Clock synchronous type semiconductor memory device
09/06/2005US6940761 Merged MOS-bipolar capacitor memory cell
09/06/2005US6940759 Group erasing system for flash array with multiple sectors
09/06/2005US6940754 Channel erase type nonvolatile semiconductor memory device and electronic card and electronic apparatus using the device
09/06/2005US6940752 Nonvolatile semiconductor memory device
09/06/2005US6940750 Magnetic memory, magnetic memory array, method for fabricating a magnetic memory, method for recording in a magnetic memory and method for reading out from a magnetic memory
09/06/2005US6940749 MRAM array with segmented word and bit lines
09/06/2005US6940748 Stacked 1T-nMTJ MRAM structure
09/06/2005US6940747 Magnetic memory device
09/06/2005US6940746 Semiconductor memory device
09/06/2005US6940745 Programmable microelectronic devices and methods of forming and programming same
09/06/2005US6940743 array of memory cells, an array of reference cells, and a plurality of sense amplifiers that are associated with respective of the memory cells; separate reference voltage generator not required
09/06/2005US6940742 Method of storing data in ferroelectric memory device
09/06/2005US6940741 Semiconductor memory device and methods of operation thereof
09/06/2005US6940740 Multilevel semiconductor memory device and method for driving the same as a neuron element in a neural network computer
09/06/2005US6940739 Semiconductor memory device
09/06/2005US6940335 Constant-voltage circuit
09/06/2005US6940325 DLL circuit
09/06/2005US6940321 Circuit for generating a data strobe signal used in a double data rate synchronous semiconductor device
09/06/2005US6940153 Magnetic shielding for magnetic random access memory card
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