Patents
Sitemap › G11 - Information storage › G11C - Static stores › G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
Patents for G11C 11 - Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor (76,008)
09/2005
09/15/2005DE102004005667A1 Integrierter Halbleiterspeicher mit temperaturabhängiger Spannungserzeugung Integrated semiconductor memory with temperature-dependent voltage generating
09/15/2005DE10053507B4 Halbleiterspeichervorrichtung A semiconductor memory device
09/15/2005DE10001371B4 Integrierte Schaltung mit einem Differenzverstärker An integrated circuit with a differential amplifier
09/15/2005CA2553577A1 Magnetic memory with a magnetic tunnel junction written in a thermally assisted manner, and method for writing the same
09/14/2005EP1575088A1 Magnetic memory device
09/14/2005EP1575056A1 Non-volatile memory and write method thereof
09/14/2005EP1575055A1 Cmis semiconductor nonvolatile storage circuit
09/14/2005EP1575054A2 Magnetic shield member, magnetic shield structure, and magnetic memory device
09/14/2005EP1573820A1 Fin field effect transistor memory cell, fin field effect transistor memory cell arrangement, and method for the production of a fin field effect transistor memory cell
09/14/2005EP1573745A2 Programmable interconnect cell for configuring a field programmable gate array
09/14/2005EP1573744A2 Current re-routing scheme for serial-programmed mram
09/14/2005EP1573743A2 Mram architecture with electrically isolated read write circuitry
09/14/2005EP1573742A2 Magnetoresistive memory cell array and mram memory comprising such array
09/14/2005EP1573081A2 Silver selenide film stoichiometry and morphology control in sputter deposition
09/14/2005EP1290786B1 Multiple output current mirror with improved accuracy
09/14/2005EP0700571B1 Memory material and method for its manufacture
09/14/2005CN2726122Y Digital follower digital storage assemblyl and static random access internal storage
09/14/2005CN1669147A Magnetic random access memory
09/14/2005CN1669146A Ferroelectric gate device
09/14/2005CN1669092A Semiconductor memory
09/14/2005CN1669091A Programming a phase-change material memory
09/14/2005CN1669090A Semiconductor memory device and method for initializing the same
09/14/2005CN1669012A DRAM supporting different burst-length accesses without changing the burst length setting in the mode register
09/14/2005CN1669006A System, apparatus, and method for a flexible DRAM architecture
09/14/2005CN1667963A Data transfer control device and electronic instrument
09/14/2005CN1667956A Modular DLL architecture for generating multiple timings
09/14/2005CN1667928A Booster circuit and semiconductor device having same
09/14/2005CN1667753A Methods and circuits for programming of a semiconductor memory cell and memory array
09/14/2005CN1667752A Semiconductor storage device
09/14/2005CN1667751A Dynamic RAM storage techniques
09/14/2005CN1667750A Apparatus for generating internal clock signal
09/14/2005CN1667749A Apparatus for canceling intersymbol interference in semiconductor memory device and method thereof
09/14/2005CN1667748A Semiconductor integrated circuit device
09/13/2005US6944833 Delay model circuit for use in delay locked loop
09/13/2005US6944742 Compressed file system for non-volatile RAM
09/13/2005US6944737 Memory modules and methods having a buffer clock that operates at different clock frequencies according to the operating mode
09/13/2005US6944708 Method of self-refresh in large memory arrays
09/13/2005US6944092 Semiconductor memory device
09/13/2005US6944091 Latency control circuit and method of latency control
09/13/2005US6944089 Synchronous semiconductor device having constant data output time regardless of bit organization, and method of adjusting data output time
09/13/2005US6944086 Semiconductor memory device
09/13/2005US6944082 Semiconductor memory device and electronic device for activation control of word lines in a semiconductor memory device
09/13/2005US6944081 Semiconductor storage and its refreshing method
09/13/2005US6944080 Dynamic random access memory(DRAM) capable of canceling out complimentary noise developed in plate electrodes of memory cell capacitors
09/13/2005US6944078 Semiconductor device
09/13/2005US6944077 Reading circuit and semiconductor memory device including the same
09/13/2005US6944076 Dynamic semiconductor memory device and bit line precharge method therefor
09/13/2005US6944074 Semiconductor memory device and method of operating the same
09/13/2005US6944071 Active termination circuit and method for controlling the impedance of external integrated circuit terminals
09/13/2005US6944069 Semiconductor memory device having column select line driving scheme for reducing skew between column select lines and column select line driving method thereof
09/13/2005US6944068 Method and system for programming and inhibiting multi-level, non-volatile memory cells
09/13/2005US6944064 Memory unit having programmable device ID
09/13/2005US6944063 Non-volatile semiconductor memory with large erase blocks storing cycle counts
09/13/2005US6944058 High data rate write process for non-volatile flash memories
09/13/2005US6944056 Semiconductor non-volatile storage device
09/13/2005US6944055 Semiconductor memory device and storage method thereof
09/13/2005US6944053 Magnetic memory with structure providing reduced coercivity
09/13/2005US6944052 Magnetoresistive random access memory (MRAM) cell having a diode with asymmetrical characteristics
09/13/2005US6944051 Data restore in thryistor based memory devices
09/13/2005US6944050 Nonvolatile memory device
09/13/2005US6944049 Magnetic tunnel junction memory cell architecture
09/13/2005US6944048 Magnetic random access memory
09/13/2005US6944046 Ferroelectric memory and method of testing the same
09/13/2005US6944044 Method for reading out or in a status from or to a ferroelectrical transistor of a memory cell and memory matrix
09/13/2005US6944043 Junction-isolated depletion mode ferroelectric memory devices
09/13/2005US6944042 Multiple bit memory cells and methods for reading non-volatile data
09/13/2005US6944041 Circuit for accessing a chalcogenide memory array
09/13/2005US6943613 Semiconductor integrated circuit device in which operating frequency, supply voltage and substrate bias voltage are controllable to reduce power consumption
09/13/2005US6943604 Device and method for correcting the duty cycle of a clock signal
09/13/2005US6943603 Pulse generating circuit and semiconductor device provided with same
09/13/2005US6943420 Magnetic random access memory (MRAM) devices having nonparallel main and reference magnetic resistors
09/13/2005US6943417 DNA-based memory device and method of reading and writing same
09/13/2005US6943402 Nonvolatile semiconductor memory device including MOS transistors each having a floating gate and control gate
09/13/2005US6943395 Phase random access memory with high density
09/13/2005US6943394 Magnetic storage apparatus and manufacturing method thereof
09/13/2005US6943393 Memory cell arrangement and method of fabricating it
09/13/2005US6943373 Semiconductor memory device using vertical-channel transistors
09/13/2005US6943370 Control of memory arrays utilizing zener diode-like devices
09/13/2005US6943365 Electrically programmable memory element with reduced area of contact and method for making same
09/13/2005US6943083 Merged MOS-bipolar capacitor memory cell
09/13/2005US6943041 Magnetoresistive element and method for producing the same, as well as magnetic head, magnetic memory and magnetic recording device using the same
09/13/2005US6943040 Magnetic random access memory designs with controlled magnetic switching mechanism by magnetostatic coupling
09/13/2005US6943038 Method for fabricating a flux concentrating system for use in a magnetoelectronics device
09/09/2005WO2005083716A1 Dll circuit
09/09/2005WO2005083715A1 Multi-layer memory arrays
09/09/2005WO2005083714A1 Perpendicular magnetization magnetic element utilizing spin transfer
09/09/2005WO2005082061A2 Spin transfer magnetic element with free layers having high perpendicular anisotropy and in-plane equilibrium magnetization
09/09/2005WO2005081798A2 Twin eeprom memory transistors with subsurface stepped floating gates
09/09/2005WO2005081769A2 Nor-type channel-program channel-erase contactless flash memory on soi
09/09/2005WO2005041108A3 A method circuit and system for read error detection in a non-volatile memory array
09/09/2005WO2005006338A3 Magnetoelectronics information device having a compound magnetic free layer
09/09/2005WO2005001841A3 Safe write to multiply-redundant storage
09/09/2005CA2738882A1 Low leakage and data retention circuitry
09/08/2005US20050198462 Charge transfer complexes including an electron donor and an electron acceptor as basis of resistive memories
09/08/2005US20050197621 Method and a system for assisting a user in a medical self treatment, said self treatment comprising a plurality of actions
09/08/2005US20050195977 Semiconductor memory apparatus
09/08/2005US20050195680 Semiconductor storage device
09/08/2005US20050195679 Data sorting in memories
09/08/2005US20050195674 Semiconductor memory device capable of stably performing entry and exit operations of self refresh mode and the self refresh method thereof
09/08/2005US20050195672 Current sense amplifier circuits having a bias voltage node for adjusting input resistance
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