Patents
Patents for G01R 31 - Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere (152,264)
01/2007
01/11/2007US20070011545 System and method for testing a nas
01/11/2007US20070011544 Reprogramming of tester resource assignments
01/11/2007US20070011543 Test pattern generation method
01/11/2007US20070011542 Reduced-pin-count-testing architectures for applying test patterns
01/11/2007US20070011541 Methods and systems for identifying intermittent errors in a distributed code development environment
01/11/2007US20070011540 Telecommunications network testing
01/11/2007US20070011539 Self test structure for interconnect and logic element testing in programmable devices
01/11/2007US20070011538 Circuit and method for performing built-in self test and computer readable recording medium for storing program thereof
01/11/2007US20070011537 Systems and methods for self-diagnosing LBIST
01/11/2007US20070011536 Automated BIST execution scheme for a link
01/11/2007US20070011535 Semiconductor integrated circuit
01/11/2007US20070011534 Self-synchronising bit error analyser and circuit
01/11/2007US20070011533 Method and apparatus for reducing number of transitions generated by linear feedback shift register
01/11/2007US20070011532 Semiconductor chip and semiconductor integrated circuit device
01/11/2007US20070011531 Methods and apparatus for managing clock skew between clock domain boundaries
01/11/2007US20070011530 Decompressor/PRPG for applying pseudo-random and deterministic test patterns
01/11/2007US20070011529 Semiconductor device and test method thereof
01/11/2007US20070011528 Method and apparatus for testing an ultrasound system
01/11/2007US20070011527 Generating responses to patterns stimulating an electronic circuit with timing exception paths
01/11/2007US20070011526 Position independent testing of circuits
01/11/2007US20070011525 Semiconductor integrated circuit and control method thereof
01/11/2007US20070011524 Scan test circuit and method of arranging the same
01/11/2007US20070011523 Method, apparatus, and computer program product for diagnosing a scan chain failure employing fuses coupled to the scan chain
01/11/2007US20070011522 System and methods for functional testing of embedded processor-based systems
01/11/2007US20070011521 Integrated scannable interface for testing memory
01/11/2007US20070011520 Element substrate, test method for element substrate, and manufacturing method for semiconductor device
01/11/2007US20070011519 Semiconductor failure analysis apparatus, failure analysis method, failure analysis program, and failure analysis system
01/11/2007US20070011518 Method and apparatus for selectively accessing and configuring individual chips of a semi-conductor wafer
01/11/2007US20070011517 Debug system for data tracking
01/11/2007US20070011516 Method and apparatus to launch write queue read data in a microprocessor recovery unit
01/11/2007US20070011515 System and method for evaluating an expression in a debugger
01/11/2007US20070011514 Data compression
01/11/2007US20070011506 Semiconductor integrated circuit verifying and inspecting method
01/11/2007US20070011468 LSI design method and verification method
01/11/2007US20070010093 METHOD OF ROOM TEMPERATURE GROWTH OF SIOx ON SILICIDE AS AN ETCH STOP LAYER FOR METAL CONTACT OPEN OF SEMICONDUCTOR DEVICES
01/11/2007US20070010032 Defect identification system and method for repairing killer defects in semiconductor devices
01/11/2007US20070007995 Physical layers
01/11/2007US20070007990 Testing device with plural lenses
01/11/2007US20070007989 System For Measuring Signal Path Resistance For An Integrated Circuit Tester Interconnect Structure
01/11/2007US20070007988 LSI inspection method and defect inspection data analysis apparatus
01/11/2007US20070007987 System for testing semiconductor components
01/11/2007US20070007986 Apparatus for hot-probing integrated semiconductor circuits on wafers
01/11/2007US20070007985 Semiconductor integrated circuit device
01/11/2007US20070007984 Socket for inspection apparatus
01/11/2007US20070007983 Semiconductor wafer tester
01/11/2007US20070007982 Test head for semiconductor integrated circuit tester
01/11/2007US20070007981 Optimize parallel testing
01/11/2007US20070007980 High Density Planar Electrical Interface
01/11/2007US20070007979 Probe device capable of being used for plural kinds of testers
01/11/2007US20070007978 Method and Apparatus for Non-Contact Testing and Diagnosing Electrical Paths Through Connectors on Circuit Assemblies
01/11/2007US20070007977 Probe Card Assembly With An Interchangeable Probe Insert
01/11/2007US20070007976 Circuit board storage bag and storage rack
01/11/2007US20070007975 Scanned impedance imaging system method and apparatus
01/11/2007US20070007974 Method for reducing integral stress of a vertical probe with specific structure
01/11/2007US20070007971 Circuit for detecting difference in capacitance
01/11/2007US20070007968 Power monitoring system including a wirelessly communicating electrical power transducer
01/11/2007US20070007948 Electrical connection device
01/11/2007US20070007947 Impedance conversion circuit and integrated circuit including thereof
01/11/2007US20070007946 Process for handling semiconductor devices and transport media in automated sorting equipment
01/11/2007DE69735918T2 Verbesserungen bei oder in Bezug auf nichtflüchtige Speicheranordnungen Improvements in or relating to non-volatile memory devices
01/11/2007DE202005017059U1 Testing device e.g. for electric circuit boards such like device under test, has unit having contact element for electronic contacting of edge contact of test specimen with electronic evaluator connected
01/11/2007DE19923243B4 Halbleiterprüfsystem Semiconductor test system
01/11/2007DE19908521B4 Verfahren zum Kompaktifizieren einer Folge von Testvektoren zum Testen eines Systems A method for Kompaktifizieren a sequence of test vectors for testing a system
01/11/2007DE102006028141A1 Wafer testing method, involves positioning electrical contacts and mating contacts with respect to one another with assistance of optical detection of contact-making apparatus and unit under test
01/11/2007DE102006023257A1 Vorrichtung zum Heissproben von integrierten Halbleiterschaltkreisen auf Wafern An apparatus for hot samples of semiconductor integrated circuits on wafers
01/11/2007DE102006023188A1 Elektrowerkzeug, Batterie, Ladegerät und Verfahren zu deren Betrieb Power tool battery, charger and method for its operation
01/11/2007DE102005032227A1 Closed current measuring system e.g. for motor vehicles, has electronic current measuring circuit built into vehicle at assembly-line and circuit arranged in or bonded and connects negative pole to automotive battery
01/11/2007DE102005031981A1 Switching configuration e.g. for variable capacitor adaptation when testing capacitor and transformers, has parallel connection of same groups of individual components which are arranged in series
01/11/2007DE102005031963A1 Switching configuration e.g. for switching configuration, has first port and second port with components arranged inbetween and LED provided and operated to its normal function by voltage to ports
01/11/2007DE102005030907A1 Multiple string solar generator isolation resistance test procedure connects plus and minus poles of all other strings to measure string under test
01/11/2007DE102005030496A1 Wafer testing method, involves positioning electrical contacts and mating contacts with respect to one another with assistance of optical detection of contact-making apparatus and unit under test
01/11/2007DE102005029316A1 Energieversorgungseinrichtung für ein Flurförderzeug Power supply device for a truck
01/11/2007DE102005027670A1 Anordnung und Verfahren zur Lagerstromüberwachung eines Elektromotors Apparatus and method for monitoring an electric motor bearing current
01/11/2007DE102005024649A1 Vorrichtung und Verfahren zum Messen von Jitter Apparatus and method for measuring jitter
01/11/2007DE102004055847B4 Verfahren zur Fertigung einer Batteriesensorvorrichtung A process for the production of a battery sensor device
01/11/2007CA2612792A1 Method and system for luminance characterization
01/10/2007EP1742407A1 Protection of digital data contained within an integrated circuit with a JTAG interface
01/10/2007EP1742365A1 Circuit testing apparatus, circuit testing method, and signal distributing method therefor
01/10/2007EP1742076A2 Method of testing active electrical components
01/10/2007EP1742075A1 Test method for an electronic circuit comprising a signature-based secure test mode and associated electronic circuit.
01/10/2007EP1742074A1 Test device and test method
01/10/2007EP1742073A1 Electric connecting device
01/10/2007EP1741247A2 Router configured for outputting update messages specifying a detected attribute change of a connected active path according to a prescribed routing protocol
01/10/2007EP1741221A2 Forward error correction in packet networks
01/10/2007EP1741172A2 Power supply device
01/10/2007EP1741111A1 Compliant electrical contact assembly
01/10/2007EP1740965A2 Storage switch traffic bandwidth control
01/10/2007EP1740964A1 Method and apparatus for characterising a three phase transformer using a single phase power supply
01/10/2007EP1740963A2 Double side probing of semiconductor devices
01/10/2007EP1740961A2 System for high dynamic range analysis in flow cytometry
01/10/2007EP1678512B1 Method and device for measuring radio interference levels with frequency tracking
01/10/2007EP1290718A4 Process perturbation to measured-modeled method for semiconductor device technology modeling
01/10/2007EP1143615B1 Noise sequence generator for generating a plurality of noise sequences
01/10/2007CN2857185Y Opening detector of machine cover
01/10/2007CN2857034Y Battery testing clamp
01/10/2007CN2857033Y Smoothness detection gear of circuit board test floor
01/10/2007CN2857032Y Circuit board tester
01/10/2007CN2857031Y Single-phase earthing wire selector of resonance earthing system
01/10/2007CN2857030Y Discharging sampling device for detecting power cable faults
01/10/2007CN1894852A Delay circuit and testing apparatus