Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
06/1995
06/07/1995EP0656644A1 Method of manufacturing a crystallized semiconductor layer and semiconductor devices using it
06/07/1995EP0656627A2 An adjustable threshold voltage circuit
06/06/1995US5422902 BeTe-ZnSe graded band gap ohmic contact to p-type ZnSe semiconductors
06/06/1995US5422844 Nonvolatile semiconductor memory
06/06/1995US5422841 Semiconductor memory device having reverse base current bipolar transistor-field effect transistor memory cell
06/06/1995US5422731 Semiconductor arrangement made of compound semiconductor material
06/06/1995US5422510 MOS transistor with non-uniform channel dopant profile
06/06/1995US5422509 Integrated current-limiter device for power MOS transistors
06/06/1995US5422508 BiCDMOS structure
06/06/1995US5422506 Field effect transistor structure heavily doped source/drain regions and lightly doped source/drain regions
06/06/1995US5422505 FET having gate insulating films whose thickness is different depending on portions
06/06/1995US5422504 EEPROM memory device having a sidewall spacer floating gate electrode and process
06/06/1995US5422503 CCD shift register with improved reading device
06/06/1995US5422502 Base region comprises of silicon-germanium alloy or super-lattice structure comprising alternate layers of silicon and silicon-germanium alloy; telecommunication application
06/06/1995US5422501 Method of integrating heterojunction bipolar transistors with heterojunction FETs and PIN diodes
06/06/1995US5422500 Having layer of group IVa metal or alloy thereof
06/06/1995US5422496 Interband single-electron tunnel transistor and integrated circuit
06/06/1995US5422309 Method for producing a metallization level having contacts and interconnects connecting the contacts
06/06/1995US5422307 Method of making an ohmic electrode using a TiW layer and an Au layer
06/06/1995US5422306 Method of forming semiconductor hetero interfaces
06/06/1995US5422305 Method of forming implanted silicon resonant tunneling barriers
06/06/1995US5422303 Method for manufacturing a laterally limited, single-crystal region on a substrate and the employment thereof for the manufacture of an MOS transistor and a bipolar transistor
06/06/1995US5422301 Method of manufacturing semiconductor device with MOSFET
06/06/1995US5422291 Method of making an EPROM cell with a readily scalable interpoly dielectric
06/06/1995US5422288 Method of doping a JFET region in a MOS-gated semiconductor device
06/06/1995US5422287 Thin film transistor and process for producing the same
06/06/1995US5422286 Process for fabricating high-voltage semiconductor power device
06/06/1995US5421910 Comprising indium, antimony and thulium
06/01/1995WO1995015008A1 Improved mesh geometry for mos-gated semiconductor devices
06/01/1995DE4442106A1 Transistor arrangement for e.g. MOSFet
06/01/1995DE4442067A1 Programmable permanent memory cell
06/01/1995DE4430483A1 MOS-transistor for e.g. DRAM semiconductor memory device
06/01/1995DE4415412C1 Field effect-controllable semiconductor device prodn.
06/01/1995DE4410461C1 Thyristor with anode side getter region
06/01/1995DE4340592A1 Non-volatile semiconductor memory, especially EEPROM
05/1995
05/31/1995EP0655837A2 Gate drive technique for a bidirectional blocking lateral mosfet
05/31/1995EP0655788A1 A volatile memory cell
05/31/1995EP0655787A2 Transistor with common base region
05/31/1995EP0655786A2 Gate electrode formed in trench and method of making the same
05/31/1995EP0655785A2 Nonvolatile semiconductor memory device and its manufacturing method
05/31/1995EP0655784A1 Triangular protection component
05/31/1995EP0655777A2 Varactor and method of forming
05/31/1995EP0655774A2 Method of forming polycrystalline silicon layer and surface treatment apparatus therefor
05/31/1995CN1103206A Semiconductor device with an most provided with an extended drain region for high voltages
05/30/1995US5420812 Bidirectional type CCD
05/30/1995US5420462 Semiconductor device with conductors on stepped substrate having planar upper surfaces
05/30/1995US5420457 Semiconductor device
05/30/1995US5420454 Selective epitaxial silicon for intrinsic-extrinsic base link
05/30/1995US5420451 Bidirectional blocking lateral MOSFET with improved on-resistance
05/30/1995US5420450 Semiconductor device having stable breakdown voltage in wiring area
05/30/1995US5420442 N-type antimony-based strained layer superlattice
05/30/1995US5420073 Structure and method for a superbarrier to prevent diffusion between a noble and a non-noble metal
05/30/1995US5420060 Method of making contract-free floating-gate memory array with silicided buried bitlines and with single-step defined floating gates
05/30/1995US5420059 Manufacturing semiconductors
05/30/1995US5420058 Method of making field effect transistor with a sealed diffusion junction
05/30/1995US5420057 Simplified contact method for high density CMOS
05/30/1995US5420056 Junction contact process and structure for semiconductor technologies
05/30/1995US5420053 Method for manufacturing semiconductor device having bipolar transistor and polycrystalline silicon resistor
05/30/1995US5420052 Method of fabricating a semiplanar heterojunction bipolar transistor
05/30/1995US5420050 Forming Sio2 to block current at emitter interface
05/30/1995US5420048 Manufacturing method for SOI-type thin film transistor
05/30/1995US5420045 Process for manufacturing thyristor with adjustable breakover voltage
05/30/1995US5419809 Dry etching method
05/30/1995US5419804 Semiconductor etching process
05/30/1995US5419199 Semiconductor device having a stress transducer driven by a temperature compensating reference voltage source
05/26/1995WO1995013891A1 Making quantum dot particles of uniform size
05/26/1995WO1995013693A1 Diamond shaped gate mesh for cellular mos transistor array
05/26/1995CA2176569A1 Making quantum dot particles of uniform size
05/24/1995EP0654830A2 Semiconductor integrated circuit device
05/24/1995EP0654829A1 Increased density MOS-gated double diffused semiconductor devices
05/24/1995EP0654828A2 TFT with reduced parasitic capacitance
05/24/1995EP0654827A1 Integrated power cascode
05/24/1995EP0654817A1 Process for fabrication of a matrix of thin film transistors
05/24/1995EP0654791A1 Method for supplying negative programming voltages to non-volatile memory cells in a non-volatile memory device, and integrated structure for actuating such method
05/24/1995EP0654173A1 High density power device structure and fabrication process
05/24/1995EP0654169A1 Cubic metal oxide thin film epitaxially grown on silicon
05/24/1995CN1102903A 半导体存储装置 The semiconductor memory device
05/23/1995US5418752 Flash EEPROM system with erase sector select
05/23/1995US5418742 Nonvolatile semiconductor memory with block erase select means
05/23/1995US5418687 Wafer scale multi-chip module
05/23/1995US5418636 Liquid crystal image display apparatus with anodized films of the same thickness and a method of fabricating the same
05/23/1995US5418398 Conductive structures in integrated circuits
05/23/1995US5418394 Power MOSFET with improved avalanche resistance
05/23/1995US5418393 Thin-film transistor with fully gated channel region
05/23/1995US5418392 LDD type MOS transistor
05/23/1995US5418391 Semiconductor-on-insulator integrated circuit with selectively thinned channel region
05/23/1995US5418390 Single polysilicon layer E2 PROM cell
05/23/1995US5418389 Field-effect transistor with perovskite oxide channel
05/23/1995US5418386 Circuit construction for controlling saturation of a transistor
05/23/1995US5418376 Static induction semiconductor device with a distributed main electrode structure and static induction semiconductor device with a static induction main electrode shorted structure
05/23/1995US5418374 Ridge or groove; phosphorus containing layer; light emitters
05/23/1995US5418185 Method of making schottky diode with guard ring
05/23/1995US5418184 Method of manufacturing a semiconductor device in which dopant atoms are provided in a semiconductor body
05/23/1995US5418174 Method of forming radiation hard integrated circuits
05/23/1995US5418173 Method of reducing ionic contamination in integrated circuit fabrication
05/23/1995US5417770 Photovoltaic device and a forming method thereof
05/23/1995US5417115 Strain responsive measuring device
05/23/1995CA2134995A1 Method for manufacturing a matrix of thin-film transistors with storage capacitances
05/18/1995DE4440857A1 Gate oxide formation for semiconductor device
05/18/1995DE4402884C1 Switched power semiconductor element
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