Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
11/2003
11/20/2003WO2003096433A1 'A Planar Schottky Diode and Manufacturing Method'
11/20/2003WO2003096432A1 Pseudo-nonvolatile direct-tunneling floating-gate device
11/20/2003WO2003096431A1 Floating gate memory cells with increased coupling ratio
11/20/2003WO2003096430A1 Transistors with controllable threshold voltages, and various methods of making and operating same
11/20/2003WO2003096429A1 Method of fabricating probe for spm having fet channel structure utilizing self-aligned fabrication
11/20/2003WO2003096428A1 Trench dmos transistor structure
11/20/2003WO2003096426A1 Semiconductor substrate manufacturing method and semiconductor device manufacturing method, and semiconductor substrate and semiconductor device manufactured by the methods
11/20/2003WO2003096425A1 Flash memory cell and production method
11/20/2003WO2003096424A1 Non-volatile flash semiconductor memory and production method
11/20/2003WO2003096418A1 Improving the triggering of an esd nmos through the use of an n-type buried layer
11/20/2003WO2003096413A1 Method of manufacturing a semiconductor non-volatiel memory
11/20/2003WO2003096406A1 A surface geometry for mos-gated device
11/20/2003WO2003096405A1 Ultra small thin windows in floating gate transistors defined by lost nitride spacers
11/20/2003WO2003096404A1 A method of forming base regions and emitter windows in silicon bipolar transistors
11/20/2003WO2003096403A1 Method of treating substrate
11/20/2003WO2003096399A1 Method for producing a semiconductor component, and semiconductor component produced by the same
11/20/2003WO2003096394A2 A multi-layer inductor formed in a semiconductor substrate and having a core of ferromagnetic material
11/20/2003WO2003096390A1 High-k dielectric for thermodynamically-stable substrate-type materials
11/20/2003WO2003096385A2 Silicon-on-insulator structures and methods
11/20/2003WO2003096195A1 Adaptive processor architecture incorporating a field programmable gate array control element having at least one embedded microprocessor core
11/20/2003WO2003096177A1 Methods of computing with digital multistate phase change materials
11/20/2003WO2003096114A1 Multi-domain liquid crystal display and a thin film transistor substrate of the same
11/20/2003WO2003096113A1 A vertically aligned mode liquid crystal display
11/20/2003WO2003096110A1 Method for providing transparent substrate having protection layer on crystalized polysilicon layer, method for forming polysilicon active layer thereof and method for manufacturing polysilicon tft using the same
11/20/2003WO2003095963A2 Barometric pressure sensor
11/20/2003WO2003095108A1 Method and apparatus for two dimensional assembly of particles
11/20/2003WO2003067629A3 Band gap compensated hbt
11/20/2003WO2003058644A3 Superhard dielectric compounds and methods of preparation
11/20/2003WO2003050881A3 Super self-aligned collector device for mono-and hetero bipolar junction transistors, and method of making same
11/20/2003WO2003041186A3 Organic thin film transistor with siloxane polymer interface
11/20/2003WO2003041124A3 Method of fabricating a gate stack at low temperature
11/20/2003WO2003038863A3 Trench dmos device with improved drain contact
11/20/2003WO2003030278A3 Composition, method and electronic device
11/20/2003WO2003026021A3 Gallium nitride based diodes with low forward voltage and low reverse current operation
11/20/2003WO2003012850B1 Selective metal oxide removal
11/20/2003WO2003007234A3 Information register
11/20/2003WO2002095819A3 Structure and method to preserve sti during etching
11/20/2003WO2002078087A3 Semiconductor chip having multiple conductive layers in an opening, and method for fabricating same
11/20/2003WO2002064853A3 Thin films and methods of making them using trisilane
11/20/2003WO2002025719A8 Reduced capacitance scaled hbt using a separate base post layer
11/20/2003US20030216059 Plasma nitridation for reduced leakage gate dielectric layers
11/20/2003US20030216032 Method for forming MRAM bit having a bottom sense layer utilizing electroless plating
11/20/2003US20030216022 Semiconductor device and method of fabricating the same
11/20/2003US20030216021 Method for fabricating semiconductor device
11/20/2003US20030216020 Method for forming multi-layer gate structure
11/20/2003US20030216018 Manufacturing method of semiconductor device
11/20/2003US20030216015 Method of manufacturing semiconductor device
11/20/2003US20030216013 Method of controlling grain size in a polysilicon layer and in semiconductor devices having polysilicone structures
11/20/2003US20030216012 Method and apparatus for crystallizing semiconductor with laser beams
11/20/2003US20030216009 Semiconductor device and manufacturing the same
11/20/2003US20030216005 Method for forming transistor of semiconductor device
11/20/2003US20030216004 Method for manufacturing semiconductor device having increased effective channel length
11/20/2003US20030216003 Method of forming flash memory device
11/20/2003US20030216002 Method of manufacturing flash memory device
11/20/2003US20030216000 Methods of forming programmable memory devices
11/20/2003US20030215996 Process for producing oxide thin films
11/20/2003US20030215995 Chemical vapor deposition of silicate high dielectric constant materials
11/20/2003US20030215992 Method for forming transistor of semiconductor device
11/20/2003US20030215991 Method for fabricating semiconductor device with ultra-shallow super-steep-retrograde epi-channel by decaborane doping
11/20/2003US20030215989 Semiconductor device having gate all around type transistor and method of forming the same
11/20/2003US20030215988 Self-aligned dual-gate transistor device and method of forming self-aligned dual-gate transistor device
11/20/2003US20030215987 Simple process for fabricating semiconductor devices
11/20/2003US20030215986 Gate structure for a transistor and method for fabricating a transistor with the gate structure
11/20/2003US20030215985 Semiconductor wafer and manufacturing method of semiconductor device
11/20/2003US20030215974 Enhancement of membrane characteristics in semiconductor device with membrane
11/20/2003US20030214864 Split gate memory device and fabricating method thereof
11/20/2003US20030214792 Multi-feature-size electronic structures
11/20/2003US20030214773 Protection circuit section for semiconductor circuit system
11/20/2003US20030214767 Method and apparatus for providing ESD protection and/or noise reduction in an integrated circuit
11/20/2003US20030214496 Image display device
11/20/2003US20030214337 Latch circuit
11/20/2003US20030214054 Electron device and process of manufacturing thereof
11/20/2003US20030214042 Circuit substrate, electro-optical device and electronic appliances
11/20/2003US20030214022 Bit line landing pad and borderless contact on bit line stud with localized etch stop layer formed in void region, and manufacturing method thereof
11/20/2003US20030214016 Compact layout for a semiconductor device
11/20/2003US20030214012 Power device having electrodes on a top surface thereof
11/20/2003US20030214011 Short channel trench power MOSFET with low threshold voltage
11/20/2003US20030214009 Trench mos resurf super-junction devices
11/20/2003US20030214006 Semiconductor device and manufacturing method thereof
11/20/2003US20030214005 A-C:H ISFET device, manufacturing method, and testing methods and apparatus thereof
11/20/2003US20030214004 Spin valve transistor, magnetic reproducing head and magnetic information storage system
11/20/2003US20030214003 Single chip multiple range pressure transducer device and method for fabricating the same
11/20/2003US20030214001 Semiconductor device and method for manufacturing the same
11/20/2003US20030214000 Methods of fabricating integrated circuit devices having uniform silicide junctions and integrated circuit devices fabricated thereby
11/20/2003US20030213999 ESD protection scheme for outputs with resistor loading
11/20/2003US20030213997 Asymmetrical MOSFET layout for high currents and high speed operation
11/20/2003US20030213996 Integrated circuit provided with overvoltage protection and method for manufacture thereof
11/20/2003US20030213993 Formed below its base region to improve its breakdown voltage
11/20/2003US20030213991 Flash memory cell
11/20/2003US20030213987 MIS capacitor and method of formation
11/20/2003US20030213983 Charge-coupled device having a reduced width for barrier sections in a transfer channel
11/20/2003US20030213982 Semiconductor memory device and method for manufacturing the same
11/20/2003US20030213977 Heterojunction bipolar transistor
11/20/2003US20030213975 Semiconductor device
11/20/2003US20030213973 Heterojunction bipolar transistor and its manufacturing method
11/20/2003US20030213971 Silicon controlled rectifier ESD structures with trench isolation
11/20/2003US20030213970 Method and apparatus for forming a capacitive structure including single crystal silicon
11/20/2003US20030213966 Deposition method of insulating layers having low dielectric constant of semiconductor device, a thin film transistor substrate using the same and a method of manufacturing the same
11/20/2003US20030213961 Method and apparatus for forming a capacitive structure including single crystal silicon
11/20/2003US20030213957 Thin film semiconductor device