Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
04/1997
04/23/1997CN1148275A Thin film piezoelectric arrays with enhanced coupling and fabrication methods
04/23/1997CN1148274A Trench DMOS and method of fabricating the same
04/23/1997CN1148273A Transistor in semiconductor device and method of making the same
04/23/1997CN1148272A Transistor in semiconductor device and method of making the same
04/23/1997CN1148271A Semiconductor device and method of mfg. the same
04/23/1997CN1148270A Semiconductor package and mounting method
04/23/1997CN1148269A Method of Mfg. Semiconductor device
04/23/1997CN1148268A Die bonding device
04/23/1997CN1148267A Improved method of die attach
04/23/1997CN1148264A Method of planarizing film of semiconductor device
04/23/1997CN1148263A Method for mfg. semiconductor device
04/23/1997CN1148262A Semiconductor device and method for mfg. same
04/23/1997CN1148261A Method for fabricating semiconductor device
04/23/1997CN1148260A Method for forming contact holes of semiconductor device
04/23/1997CN1148188A Method and compositions for diffusion patterning
04/23/1997CN1148105A Plasma etching apparatus utilizing plasma confinement
04/23/1997CN1148104A Cleaning system and method
04/23/1997CN1148103A Process for eliminating dislocations in neck of silicon single crystal
04/23/1997CN1034703C Heterojunction bipolar transistors
04/23/1997CN1034702C Microelectronic device package contg. liquid, and method for mfg. same
04/23/1997CN1034699C Process for simulating shapes
04/22/1997US5623529 SOR exposure system and mask manufactured thereby
04/22/1997US5623443 Scalable EPROM array with thick and thin non-field oxide gate insulators
04/22/1997US5623442 Memory cells and memory devices with a storage capacitor of parasitic capacitance and information storing method using the same
04/22/1997US5623439 For storing information in the form of ferroelectric polarization
04/22/1997US5623343 For exposing a pattern of a photo-mask on a photosensitive substrate
04/22/1997US5623243 Semiconductor device having polycrystalline silicon layer with uneven surface defined by hemispherical or mushroom like shape silicon grain
04/22/1997US5623231 Push-pull power amplifier
04/22/1997US5623215 Testing of semiconductor devices
04/22/1997US5623214 Multiport membrane probe for full-wafer testing
04/22/1997US5623213 Membrane probing of circuits
04/22/1997US5623167 Semiconductor device
04/22/1997US5623166 Interconnectors
04/22/1997US5623165 Insulated gate field effect semiconductor device and forming method thereof
04/22/1997US5623164 Integrated semiconductor circuit or micromechanical component and process therefore
04/22/1997US5623163 Leadframe for semiconductor devices
04/22/1997US5623162 Lead frame having cut-out wing leads
04/22/1997US5623161 Electronic element and method of producing same
04/22/1997US5623159 For a semiconductor device
04/22/1997US5623157 Semiconductor device having a lead including aluminum
04/22/1997US5623155 MOSFET on SOI substrate
04/22/1997US5623154 Semiconductor device having triple diffusion
04/22/1997US5623153 Sub-quarter micrometer channel field effect transistor having elevated source/drain areas and lightly doped drains
04/22/1997US5623152 Insulated gate semiconductor device
04/22/1997US5623123 Semiconductor device package with small die pad and method of making same
04/22/1997US5623015 Blend of conjugated diene, vinyl substituted aromatic monomer, acrylamide, and n-methylolacrylamide
04/22/1997US5623006 Solder interconnection
04/22/1997US5622902 Passivation/patterning of PZR diamond films for high temperature operability
04/22/1997US5622900 Wafer-like processing after sawing DMDs
04/22/1997US5622899 Method of fabricating semiconductor chips separated by scribe lines used for endpoint detection
04/22/1997US5622898 Process of making an integrated circuit chip composite including parylene coated wire
04/22/1997US5622896 Method of manufacturing a thin silicon-oxide layer
04/22/1997US5622895 Metallization for polymer-dielectric multichip modules
04/22/1997US5622894 Vapor depositing a tungsten layer using tunsten hexafluoride and silane to fill the hole, selective dry etching to remove most of tungsten layer form areas out side the contact hole forming a tungsten plug in contact hole without seam
04/22/1997US5622893 Method of forming conductive noble-metal-insulator-alloy barrier layer for high-dielectric-constant material electrodes
04/22/1997US5622892 Buried under quartz and polyimide
04/22/1997US5622891 Method of manufacturing semiconductor device with reduced side gate effect
04/22/1997US5622890 Method of making contact regions for narrow trenches in semiconductor devices
04/22/1997US5622889 High capacitance capacitor manufacturing method
04/22/1997US5622888 Method of manufacturing a semiconductor device
04/22/1997US5622886 Method of making a high voltage rectifier for an integrated circuit chip
04/22/1997US5622884 Method for manufacturing a semiconductor memory cell and a polysilicon load resistor of the semiconductor memory cell
04/22/1997US5622883 Method for manufacturing semiconductor memory device having landing pad
04/22/1997US5622882 Method of making a CMOS dynamic random-access memory (DRAM)
04/22/1997US5622881 Packing density for flash memories
04/22/1997US5622880 Method of making a low power, high performance junction transistor
04/22/1997US5622879 Methods for fabricating and operating electrically erasable and programmable integrated circuit memory
04/22/1997US5622878 Method of making an integration of high voltage lateral MOS devices in low voltage CMOS architecture using CMOS-compatible process steps
04/22/1997US5622877 Nickel barrier
04/22/1997US5622875 Method for reclaiming substrate from semiconductor wafers
04/22/1997US5622873 Process for manufacturing a resin molded image pick-up semiconductor chip having a window
04/22/1997US5622814 Effective photolithographic process without accuracy adjustment photomasks
04/22/1997US5622796 Process for producing metrological structures particularly for direct measurement of errors introduced by alignment systems
04/22/1997US5622788 Multilayer bonding pad
04/22/1997US5622787 Mask for transferring a pattern for use in a semiconductor device and method of manufacturing the same
04/22/1997US5622731 Automatic post mold curing apparatus for use in providing encapsulated semiconductor chips and method therefor
04/22/1997US5622653 Mixed oxide containing indium; radiation transparent; liquid crystal displays
04/22/1997US5622636 Etch-ending point measuring method for wet-etch process
04/22/1997US5622635 Method for enhanced inductive coupling to plasmas with reduced sputter contamination
04/22/1997US5622608 Depositing copper and magnesium on substrate, annealing to form inert magnesium oxide layer
04/22/1997US5622607 Method of forming an oxide insulating film
04/22/1997US5622606 Gas inlet arrangement
04/22/1997US5622596 Semiconductors
04/22/1997US5622593 Plasma processing apparatus and method
04/22/1997US5622590 Semiconductor device and method of manufacturing the same
04/22/1997US5622588 Methods of making multi-tier laminate substrates for electronic device packaging
04/22/1997US5622586 Method of fabricating device made of thin diamond foil
04/22/1997US5622566 Semiconductors
04/22/1997US5622565 Reduction of contaminant buildup in semiconductor apparatus
04/22/1997US5622559 Method of preparing compound semiconductor
04/22/1997US5622400 Apparatus and method for handling semiconductor wafers
04/22/1997US5622305 Laser device
04/22/1997US5622304 Tape bonding apparatus
04/22/1997US5621982 Electronic substrate processing system using portable closed containers and its equipments
04/22/1997CA2105236C Method for cutting a wafer hard to cut
04/20/1997CA2188196A1 Reticle container with corner holding
04/20/1997CA2184629A1 Method and apparatus for ion beam formation in an ion implanter
04/17/1997WO1997014185A1 Semiconductor device with a planarized interconnect with poly-plug and self-aligned contacts
04/17/1997WO1997014182A1 Process for producing trench insulation in a substrate
04/17/1997WO1997014181A1 Process for the production of semi-insulating iron-doped indium phosphide wafers