| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 03/18/1997 | US5612257 Method of making flip-chip microwave integrated circuit |
| 03/18/1997 | US5612255 One dimensional silicon quantum wire devices and the method of manufacture thereof |
| 03/18/1997 | US5612254 Methods of forming an interconnect on a semiconductor substrate |
| 03/18/1997 | US5612253 Method for forming ordered titanium nitride and titanium silicide upon a semiconductor wafer using a three-step anneal process |
| 03/18/1997 | US5612252 Integrated circuits with low current density, metal contacts and apertures for electromagnetic migration |
| 03/18/1997 | US5612251 Manufacturing method and device for a polycrystalline silicon |
| 03/18/1997 | US5612250 Method for manufacturing a semiconductor device using a catalyst |
| 03/18/1997 | US5612249 Post-gate LOCOS |
| 03/18/1997 | US5612248 Method for forming field oxide or other insulators during the formation of a semiconductor device |
| 03/18/1997 | US5612247 Method for fabricating isolation region for a semiconductor device |
| 03/18/1997 | US5612246 Method for manufacturing semiconductor substrate having buck transistor and SOI transistor areas |
| 03/18/1997 | US5612245 Method of manufacturing CMOS device |
| 03/18/1997 | US5612244 Insulated gate semiconductor device having a cavity under a portion of a gate structure and method of manufacture |
| 03/18/1997 | US5612243 Polycide local interconnect method and structure |
| 03/18/1997 | US5612242 Trench isolation method for CMOS transistor |
| 03/18/1997 | US5612241 Method of manufacturing a DRAM having peripheral circuitry in which source drain interconnection contact of a MOS transistor is made small by utilizing a pad layer |
| 03/18/1997 | US5612240 Method for making electrical connections to self-aligned contacts that extends beyond the photo-lithographic resolution limit |
| 03/18/1997 | US5612239 Transistors with connectors, dopes of p and n in silicon with silicon oxide and polycrystalline silicon, patterns and etching with drains |
| 03/18/1997 | US5612238 Method of manufacturing first and second memory cell arrays with a capacitor and a nonvolatile memory cell |
| 03/18/1997 | US5612237 Method of making flash EEPROM cell |
| 03/18/1997 | US5612236 Method of forming a silicon semiconductor device using doping during deposition of polysilicon |
| 03/18/1997 | US5612235 Method of making thin film transistor with light-absorbing layer |
| 03/18/1997 | US5612234 Liquid crystal displays on substrates with insulating layers |
| 03/18/1997 | US5612233 Method for manufacturing a single electron component |
| 03/18/1997 | US5612232 Method of fabricating semiconductor devices and the devices |
| 03/18/1997 | US5612230 Process for manufacturing a semiconductor device by applying a non-single-crystalline material on a sidewall inside of an opening portion for growing a single-crystalline semiconductor body |
| 03/18/1997 | US5612229 Solar cells with reflecting layer with high conversion efficiency and high productive efficiency forming thin films by sputtering |
| 03/18/1997 | US5612228 Thin film transistors with supports |
| 03/18/1997 | US5612169 Used in manufacture of offset printing plates and photoresists |
| 03/18/1997 | US5612144 Electrification removing component |
| 03/18/1997 | US5612082 Metal oxide thin films used in integrated circuits |
| 03/18/1997 | US5612068 Apparatus for the transfer of substrates |
| 03/18/1997 | US5611946 Multi-wavelength laser system, probe station and laser cutter system using the same |
| 03/18/1997 | US5611940 Microsystem with integrated circuit and micromechanical component, and production process |
| 03/18/1997 | US5611888 Plasma etching of semiconductors |
| 03/18/1997 | US5611884 Flip chip silicone pressure sensitive conductive adhesive |
| 03/18/1997 | US5611876 Method of making a multilayer LTCC tub architecture for hermetically sealing semiconductor die, external electrical access for which is provided by way of sidewall recesses |
| 03/18/1997 | US5611865 Alignment of a shadow frame and large flat substrates on a heated support |
| 03/18/1997 | US5611863 Semiconductor processing apparatus and cleaning method thereof |
| 03/18/1997 | US5611861 Rotary type apparatus for processing semiconductor wafers and method of processing semiconductor wafers |
| 03/18/1997 | US5611858 Apparatus for transporting discoidal substrates in a vacuum coating apparatus |
| 03/18/1997 | US5611855 Method for manufacturing a calibration wafer having a microdefect-free layer of a precisely predetermined depth |
| 03/18/1997 | US5611685 Substrate heat treatment apparatus |
| 03/18/1997 | US5611655 Vacuum process apparatus and vacuum processing method |
| 03/18/1997 | US5611481 Integrated electronic device having flip-chip connection with circuit board and fabrication method thereof |
| 03/18/1997 | US5611478 Lead frame clamp for ultrasonic bonding |
| 03/18/1997 | US5611452 Sealable transportable container having improved liner |
| 03/18/1997 | US5611448 Wafer container |
| 03/18/1997 | US5611140 Method of forming electrically conductive polymer interconnects on electrical substrates |
| 03/18/1997 | CA2092370C Forming resistors for integrated circuits |
| 03/18/1997 | CA2058513C Soi-type thin film transistor and manufacturing method therefor |
| 03/13/1997 | WO1997009741A1 An arrangement and method for detecting sequential processing effects in manufacturing using predetermined sequences within runs |
| 03/13/1997 | WO1997009740A1 Process and device for testing a chip |
| 03/13/1997 | WO1997009739A1 Solder deposit support |
| 03/13/1997 | WO1997009738A1 Reduction of dislocations in a heteroepitaxial semiconductor structure |
| 03/13/1997 | WO1997009737A1 Wafer support system |
| 03/13/1997 | WO1996027206A3 Polysilicon polish for patterning improvement |
| 03/13/1997 | DE19637162A1 Low temp. and pressure, direct bonding of nitride surface |
| 03/13/1997 | DE19636735A1 Prodn. of multilayered circuit substrate |
| 03/13/1997 | DE19636727A1 Halbleiterbauelement und Verfahren zur Herstellung des Halbleiterbauelements A semiconductor device and method of manufacturing the semiconductor device |
| 03/13/1997 | DE19636553A1 Integrated semiconductor circuit device with e.g. thyristor for solid state relay |
| 03/13/1997 | DE19636302A1 Silicon carbide semiconductor device, e.g. vertical high power MOSFET |
| 03/13/1997 | DE19636054A1 Semiconductor device, e.g. DRAM |
| 03/13/1997 | DE19629090A1 High power bipolar transistor, e.g. HBT, for handling HF signal |
| 03/13/1997 | DE19600994A1 Verfahren und Vorrichtung zum Testen eines Chips A method and apparatus for testing a chip |
| 03/13/1997 | DE19533313A1 Semiconductor transistor device structure for e.g. CMOS FET |
| 03/13/1997 | DE19533169A1 Lotdepotträger Solder deposit |
| 03/13/1997 | DE19530989C1 Verfahren zum Filmstrippen A method of film stripping |
| 03/12/1997 | EP0762518A2 Improvements in or relating to semiconductor devices |
| 03/12/1997 | EP0762517A2 Improvements in or relating to semiconductor devices |
| 03/12/1997 | EP0762512A1 Schottky barrier diode |
| 03/12/1997 | EP0762511A1 Bipolar transistor and method of manufacturing the same |
| 03/12/1997 | EP0762510A2 Method for fabricating a monolithic semiconductor device with integrated surface micromachined structures |
| 03/12/1997 | EP0762508A2 Semiconductor device having charge transfer device equipped with three semiconductor layers of same conductivity type with mutually different concentrations |
| 03/12/1997 | EP0762502A1 DRAM cell array layout |
| 03/12/1997 | EP0762501A1 Monolithic integrated device of PIN diode and field effect transistor and method of manufacturing the same |
| 03/12/1997 | EP0762500A1 Planar PIN diode and method of manufacturing the same |
| 03/12/1997 | EP0762499A1 Monolithic integrated device of PIN diode and field effect transistor and method of manufacturing the same |
| 03/12/1997 | EP0762498A2 Fuse window with controlled fuse oxide thickness |
| 03/12/1997 | EP0762497A1 Tape carrier package structure with reinforced outer leads |
| 03/12/1997 | EP0762493A1 Semiconductor device having field oxide regions and a field implant and method of manufacturing the same |
| 03/12/1997 | EP0762492A1 Semiconductor device manufacturing method |
| 03/12/1997 | EP0762491A2 Electrostatic chuck member and a method of producing the same |
| 03/12/1997 | EP0762490A2 Method of manufacturing a LDD-MOSFET |
| 03/12/1997 | EP0762489A2 Method for fabricating a heterojunction bipolar transistor |
| 03/12/1997 | EP0762488A2 Cleaning solution for cleaning semiconductor device and cleaning method using the same |
| 03/12/1997 | EP0762486A2 Etching of nitride crystal |
| 03/12/1997 | EP0762485A2 Method of manufacturing a contact hole |
| 03/12/1997 | EP0762484A1 Method of forming an epitaxial layer with minimal autodoping |
| 03/12/1997 | EP0762483A1 Wafer processing system |
| 03/12/1997 | EP0762482A1 Apparatus for etching wafer |
| 03/12/1997 | EP0762481A2 Method of storing and transporting wafers and method of determining the amount of organic materials attached to stored wafers |
| 03/12/1997 | EP0762480A1 In-situ wafer temperature control apparatus for single wafer tools |
| 03/12/1997 | EP0762470A2 Apparatus and method for temperature control in plasma processing |
| 03/12/1997 | EP0762469A1 Method and apparatus for in situ removal of contaminants from ion beam neutralization and implantation apparatuses |
| 03/12/1997 | EP0762215A1 Surface position detecting method and apparatus and scanning exposure method and apparatus |
| 03/12/1997 | EP0762207A2 Positive working photosensitive composition and method of producing relief structures |
| 03/12/1997 | EP0762206A2 Positive working photosensitive composition and method of producing relief structures |
| 03/12/1997 | EP0761841A1 Method for forming film |
| 03/12/1997 | EP0761831A1 Thin gold alloy wire for bonding |