H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
03/1997
03/12/1997	EP0761599A2 Method of purifying alkaline solution and method of etching semiconductor wafers
03/12/1997	EP0761387A1 Polishing apparatus
03/12/1997	EP0761372A1 Preparation and bonding of workpieces to form sputtering targets and other assemblies
03/12/1997	EP0761017A1 Semiconductor device of the type sealed in glass having a silver-copper bonding layer between slugs and connection conductors
03/12/1997	EP0761015A1 Semiconductor device of the type sealed in glass comprising a semiconductor body connected to slugs by means of a silver-aluminium bonding layer
03/12/1997	EP0761014A1 Simplified dual damascene process for multilevel metallization and interconnection structure
03/12/1997	EP0760873A1 Electrolytic method and device for the continuous and uniform metallization or etching of metal surfaces
03/12/1997	EP0760794A1 Reinforced semiconductor wafer holder
03/12/1997	EP0708981A4 Process and apparatus for the treatment of semiconductor wafers in a fluid
03/12/1997	EP0644951B1 Method of nucleating tungsten on titanium nitride by cvd without silane
03/12/1997	EP0606805B1 Test method for integrated circuit devices and related integrated device
03/12/1997	EP0584081B1 A Centrifugal Wafer Processor
03/12/1997	EP0564467B1 Circuit for protecting a semiconductor device from voltage produced by discharges of static electricity
03/12/1997	CN2249451Y Technical device of high-density plasma
03/12/1997	CN1145138A Circuit device and junction field transistor suitable for the circuit device
03/12/1997	CN1145124A Photomask blanks
03/12/1997	CN1144964A Integrated logic circuit and EEPROM
03/12/1997	CN1034251C Transverse GaInAs photoelectric transistor
03/11/1997	US5611006 Hybrid type integrated optical device having double-layered substrate
03/11/1997	US5610965 Exposure method
03/11/1997	US5610868 Semiconductor memory device
03/11/1997	US5610859 Semiconductor memory device
03/11/1997	US5610856 Semiconductor integrated circuit device
03/11/1997	US5610854 Semiconductor memory device and fabrication process thereof
03/11/1997	US5610853 Ferroelectric material, and semiconductor memory, optical recording medium and micro-displacement control device using the ferroelectric material
03/11/1997	US5610831 Semiconductor element layout method employing process migration
03/11/1997	US5610791 Power sequence independent electrostatic discharge protection circuits
03/11/1997	US5610790 Method and structure for providing ESD protection for silicon on insulator integrated circuits
03/11/1997	US5610763 Illuminating optical apparatus
03/11/1997	US5610753 Optical design of laser scanner to reduce thermal sensitivity
03/11/1997	US5610747 High density, three-dimensional, intercoupled circuit structure
03/11/1997	US5610737 Thin film transistor with source and drain regions having two semiconductor layers, one being fine crystalline silicon
03/11/1997	US5610715 Displacement detecting system, an expose apparatus, and a device manufacturing method employing a scale whose displacement is detected by a selected detection head
03/11/1997	US5610686 Exposure apparatus including an antivibration control system
03/11/1997	US5610684 Projection exposure apparatus
03/11/1997	US5610683 Immersion type projection exposure apparatus
03/11/1997	US5610650 Electronic parts, thermal head, manufacturing method of the thermal head, and heat sensitive recording apparatus
03/11/1997	US5610550 Intermediate potential generator stably providing an internal voltage precisely held at a predeterminded intermediate potential level with reduced current consumption
03/11/1997	US5610549 Voltage boosting circuit of a semiconductor memory circuit
03/11/1997	US5610535 Programmable two-line, two-phase logic array
03/11/1997	US5610531 Testing method for semiconductor circuit levels
03/11/1997	US5610529 Probe station having conductive coating added to thermal chuck insulator
03/11/1997	US5610452 E-beam high voltage switching power supply
03/11/1997	US5610443 Method for encapsulating a semiconductor utilizing an epoxy resin and an onium salt compound
03/11/1997	US5610441 Angle defined trench conductor for a semiconductor device
03/11/1997	US5610439 Press-contact type semiconductor devices
03/11/1997	US5610435 Semiconductor device having an electrode which controls a surface state of the base area for minimizing a change of the D.C. amplification ratio
03/11/1997	US5610434 Mesa semiconductor structure
03/11/1997	US5610430 Semiconductor device having reduced gate overlapping capacitance
03/11/1997	US5610428 Semiconductor integrated circuit
03/11/1997	US5610427 Electrostatic protection device for use in semiconductor integrated circuit
03/11/1997	US5610426 Semiconductor integrated circuit device having excellent dual polarity overvoltage protection characteristics
03/11/1997	US5610425 Input/output electrostatic discharge protection circuit for an integrated circuit
03/11/1997	US5610424 Metal oxide semiconductor field effect transistor
03/11/1997	US5610422 Semiconductor device having a buried insulated gate
03/11/1997	US5610421 Integrated circuit with EPROM cells
03/11/1997	US5610420 Semiconductor integrated circuit device and method of manufacturing the same
03/11/1997	US5610419 Semiconductor integrated circuit device with elements isolated by trenches
03/11/1997	US5610418 Semiconductor memory device
03/11/1997	US5610413 Group II-VI compound semiconductor light emitting devices and an ohmic contact therefor
03/11/1997	US5610411 Silicon carbide bipolar semiconductor device with birdsbeak isolation structure
03/11/1997	US5610410 III-V compound semiconductor device with Schottky electrode of increased barrier height
03/11/1997	US5610406 Charged particle beam exposure method and apparatus
03/11/1997	US5610132 Of two different propylene glycol alkyl ethers and water
03/11/1997	US5610106 Plasma enhanced chemical vapor deposition of titanium nitride using ammonia
03/11/1997	US5610105 Plasma enhanced chemical vapor deposition of tetraethyl silicate
03/11/1997	US5610103 Ultrasonic wave assisted contact hole filling
03/11/1997	US5610102 Method for co-registering semiconductor wafers undergoing work in one or more blind process modules
03/11/1997	US5610101 Method of manufacturing a semiconductor device having improved coverage with increased wiring layers
03/11/1997	US5610100 Method for concurrently forming holes for interconnection between different conductive layers and a substrate element or circuit element close to the substrate surface
03/11/1997	US5610099 Process for fabricating transistors using composite nitride structure
03/11/1997	US5610097 Method for forming electrode on semiconductor
03/11/1997	US5610095 Monolithically integrated circuits having dielectrically isolated, electrically controlled optical devices and process for fabricating the same
03/11/1997	US5610094 Photoelectric conversion device
03/11/1997	US5610093 Method of manufacturing a programmable hybrid balance network
03/11/1997	US5610092 Method for fabricating large capacity NAND type ROM with short memory cell gate length
03/11/1997	US5610091 Method for manufacturing a non-volatile memory cell
03/11/1997	US5610090 Method of making a FET having a recessed gate structure
03/11/1997	US5610089 Method of fabrication of semiconductor integrated circuit device
03/11/1997	US5610088 Method of fabricating field effect transistors having lightly doped drain regions
03/11/1997	US5610087 Method for fabricating narrow base width lateral bipolar junction transistor, on SOI layer
03/11/1997	US5610086 Method of making an AlPSb/InP single heterojunction bipolar transistor on InP substrate for high-speed, high-power applications
03/11/1997	US5610085 Method of making a vertical FET using epitaxial overgrowth
03/11/1997	US5610084 Method of manufacturing an antifuse utilizing nitrogen implantation
03/11/1997	US5610082 Method for fabricating thin film transistor using back light exposure
03/11/1997	US5610081 Integrated circuit module fixing method for temperature cycling test
03/11/1997	US5610080 Method for producing semiconductor device having a body with a carrier ring connected thereto
03/11/1997	US5609994 Method for patterning photoresist film having a stepwise thermal treatment
03/11/1997	US5609988 Radiation sensitive resin composition
03/11/1997	US5609983 Quinone diazide with n-sulfonamide
03/11/1997	US5609956 (piperazinylethylamino)carbonyl-containing acrylonitrile-butadiene copolymer, maleimide compound
03/11/1997	US5609927 Processing methods for high-dielectric-constant materials
03/11/1997	US5609926 Diamond doping
03/11/1997	US5609925 Curing hydrogen silsesquioxane resin with an electron beam
03/11/1997	US5609889 Apparatus for encapsulating electronic packages
03/11/1997	US5609775 Forming metal patterns on semiconductors
03/11/1997	US5609773 Method for manufacture of multilayer wiring board and the multilayer wiring board
03/11/1997	US5609772 Cube maskless lead open process using chemical mechanical polish/lead-tip expose process
03/11/1997	US5609737 Semiconductors
03/11/1997	US5609721 Semiconductor device manufacturing apparatus and its cleaning method

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