Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/1997
10/08/1997EP0800207A1 Semiconductor devices
10/08/1997EP0800206A2 Method of simultaneously forming a contact/via plug and an interconnect
10/08/1997EP0800205A1 Method of separating electronic components using a carrier film
10/08/1997EP0800204A2 A process for device fabrication in which a thin layer of cobalt silicide is formed
10/08/1997EP0800203A2 Multiple load lock system
10/08/1997EP0800200A2 Plasma applicators
10/08/1997EP0800187A2 Electrodes for high dielectric constant materials
10/08/1997EP0800179A2 Method of programming a flash memory cell
10/08/1997EP0800091A2 Apparatus and method for testing semiconductor element and semiconductor device
10/08/1997EP0799914A2 A method and apparatus for producing semiconductor wafers
10/08/1997EP0799906A1 Semiconductor device
10/08/1997EP0799905A1 High-purity cobalt sputtering targets and method of manufacturing the same
10/08/1997EP0799903A2 Methods of sputtering a metal onto a substrate and semiconductor processing apparatus
10/08/1997EP0799512A1 Laser diode with an ion-implanted region
10/08/1997EP0799500A1 Semiconductor resistor device
10/08/1997EP0799497A1 Novel processing techniques for achieving production-worthy, low dielectric, low interconnect resistance and high performance ic
10/08/1997EP0799495A1 Silicon-germanium-carbon compositions and processes thereof
10/08/1997EP0799494A1 Apparatus for surface conditioning
10/08/1997EP0799439A1 Positioning device with a force actuator system for compensating centre-of-gravity displacements
10/08/1997EP0799096A1 Process and device for lacquering or coating a substrate
10/08/1997EP0614497B1 Apparatus and method for treating a wafer of semiconductor material
10/08/1997EP0472654B1 Low voltage triggered snap-back device
10/08/1997EP0252923B2 Method and apparatus for depositing monomolecular layers on a substrate
10/08/1997CN2264415Y Working appts. for Nanometre plant tiny structure
10/08/1997CN1161758A Prodn. of MOS gated device with reduced mask count
10/08/1997CN1161632A Transfer apparatus
10/08/1997CN1161573A Semiconductor IC device and method for mfg. same
10/08/1997CN1161571A Method of fabricating insulating layer with anti-reflecting layer
10/08/1997CN1161570A Bumpless method of attaching inner leads to semiconductor integrated circuits
10/08/1997CN1161569A Method for mfg. semiconductor device having oxide film of high quality on semiconductor substrate
10/08/1997CN1161568A Method for mfg. semiconductor device
10/08/1997CN1161567A Method of forming capacitor over semiconductor substrate
10/08/1997CN1161566A Semi-conductor device and method for mfg. same
10/08/1997CN1161563A Method and apparatus for ion beam transport
10/08/1997CN1161476A Process for producing light-receiving member, electrophotographic apparatus having light-receiving member, and electrophotographic method using light-receiving member
10/08/1997CN1161288A Gearshift apparatus for vehicle
10/08/1997CN1036102C Method for fabricating semiconductor device
10/08/1997CN1036101C Open tube aluminum-gallium diffusion process
10/08/1997CN1036096C Time constant detecting circuit and time constant adjusting circuit
10/07/1997US5675728 Apparatus and method identifying false timing paths in digital circuits
10/07/1997US5675522 Method and system for dividing analyzing region in device simulator
10/07/1997US5675471 Characterization, modeling, and design of an electrostatic chuck with improved wafer temperature uniformity
10/07/1997US5675402 Stepper light control using movable blades
10/07/1997US5675401 For an optical system
10/07/1997US5675386 Method for encoding motion image and apparatus therefor
10/07/1997US5675295 Microwave oscillator, an antenna therefor and methods of manufacture
10/07/1997US5675280 Semiconductor integrated circuit device having built-in step-down circuit for stepping down external power supply voltage
10/07/1997US5675269 Semiconductor device including resistor having precise resistance value
10/07/1997US5675265 Method of measuring delay time in semiconductor device
10/07/1997US5675263 Hot-clock adiabatic gate using multiple clock signals with different phases
10/07/1997US5675261 Probe card locking device of a probe station for testing a semiconductor wafer
10/07/1997US5675187 Reliability of metal leads in high speed LSI semiconductors using dummy vias
10/07/1997US5675186 A nonstoichiometric titanium nitride layer is interposed between titanium and aluminum interconnect layer to improve adhesion and prevent lifting of interconnect layer
10/07/1997US5675184 Integrated circuit device
10/07/1997US5675180 Vertical interconnect process for silicon segments
10/07/1997US5675175 In a semiconductor substrate
10/07/1997US5675174 Method for using fuse structure in semiconductor device
10/07/1997US5675173 Semiconductor device having a trench for isolating elements and a trench for applying a potential to a substrate
10/07/1997US5675172 Metal-insulator-semiconductor device having reduced threshold voltage and high mobility for high speed/low-voltage operation
10/07/1997US5675171 Integrated insulated gate field effect transistors with thin insulation region between field insulation regions
10/07/1997US5675170 Data output buffer
10/07/1997US5675167 Enhancement-type semiconductor having reduced leakage current
10/07/1997US5675166 FET with stable threshold voltage and method of manufacturing the same
10/07/1997US5675165 Stable SRAM cell using low backgate biased threshold voltage select transistors
10/07/1997US5675164 High performance multi-mesa field effect transistor
10/07/1997US5675163 Non-volatile semiconductor memory device with thin insulation layer below erase gate
10/07/1997US5675162 EPROM, flash memory with high coupling ratio
10/07/1997US5675160 Semiconductor memory device having an internal amplification function
10/07/1997US5675159 Recessed gate field effect transistor
10/07/1997US5674813 Process for preparing layered structure including oxide super conductor thin film
10/07/1997US5674788 Treating silicon substrate with nitrogen oxides under high pressure
10/07/1997US5674787 Selective electroless copper deposited interconnect plugs for ULSI applications
10/07/1997US5674786 Method of heating and cooling large area glass substrates
10/07/1997US5674784 Providing aluminum wiring layer, providing oxide layer, ion implanting atoms in the oxide layer to form polish stop layer, polishing oxide layer
10/07/1997US5674783 Method for improving the chemical-mechanical polish (CMP) uniformity of insulator layers
10/07/1997US5674782 Method for efficiently removing by-products produced in dry-etching
10/07/1997US5674780 Method of forming an electrically conductive polymer bump over an aluminum electrode
10/07/1997US5674779 Method for fabricating a ridge-shaped laser in a channel
10/07/1997US5674777 Method for forming silicon-boron binary compound layer as boron diffusion source in silicon electronic device
10/07/1997US5674776 Steam oxidation to form oxide layer at preferential pressure and temperature
10/07/1997US5674775 Dry etch treatment using chloride and hydrobromide
10/07/1997US5674774 Depositing polysilicon layer on substrate, polishing to remove portion of layer, portion of gate, and portion of insulating material
10/07/1997US5674773 Method for planarizing high step-height integrated circuit structures
10/07/1997US5674771 Vapor depositing a dielectric film on an etched exposed surface of metal interconnection layer
10/07/1997US5674770 Method of fabricating an SRAM device with a self-aligned thin film transistor structure
10/07/1997US5674769 Depositing, removing, selectively etching multilayer including sacrificial spacers, liners, masking and resist layers, in-situ doping; provides decoupling of channel and junction doping
10/07/1997US5674768 Method of making flash EEPROM cell having first and second floating gates
10/07/1997US5674767 Method of manufacturing a semiconductor device having a self-aligned structure for a split gate flash memory device
10/07/1997US5674764 Method of making asymmetric non-volatile memory cell
10/07/1997US5674763 Method of manufacturing a semiconductor device
10/07/1997US5674762 Method of fabricating an EPROM with high voltage transistors
10/07/1997US5674760 Method of forming isolation regions in a MOS transistor device
10/07/1997US5674759 Heating the sandwiched nitride layer to diffuse hydrogen from silicon layer into transistor
10/07/1997US5674758 Silicon on insulator achieved using electrochemical etching
10/07/1997US5674757 Process of fabricating a self-aligned thin-film transistor for a liquid crystal display
10/07/1997US5674756 Method for intrinsic-gettering silicon wafer
10/07/1997US5674660 Non-tacky photoimageable electrodepositable photoresist composition
10/07/1997US5674659 Coating porous photoresist film on conductive substrate, roll-pressing with heating to change film from porous to uniform, photoetching
10/07/1997US5674657 Phenolic resin copolymer comprising meta-cresol, para-cresol and other phenolic monomer selected from xylenols, methoxyphenols; radiation sensitivity
10/07/1997US5674650 Method of repetitively imaging a mask pattern on a substrate, and apparatus for performing the method