| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 01/12/1999 | US5859784 Method for impurity distribution simulation |
| 01/12/1999 | US5859760 Microelectronic capacitors having tantalum pentoxide dielectrics and oxygen barriers |
| 01/12/1999 | US5859758 For a semiconductor device |
| 01/12/1999 | US5859683 Transmissive liquid crystal display apparatus and method for producing the same |
| 01/12/1999 | US5859677 Active matrix liquid crystal display device with independent potentials applied to the opposing electrode and the transistor side conductive light shielding film |
| 01/12/1999 | US5859539 For testing multiple semiconductor devices |
| 01/12/1999 | US5859501 Radio frequency generating systems and methods for forming pulse plasma using gradually pulsed time-modulated radio frequency power |
| 01/12/1999 | US5859478 Semiconductor device including a main alignment mark having peripheral minute alignment marks |
| 01/12/1999 | US5859477 Apparatus for encapsulating IC packages with diamond substrate thermal conductor |
| 01/12/1999 | US5859476 Semiconductor device |
| 01/12/1999 | US5859472 Microelectronic lead assembly to connect microelectronic elements |
| 01/12/1999 | US5859470 Chemical resistant solder connector containing bismuth, lead, tin, cadmium and indium; solid at room temperature, will liquify at temperature when interconnections during use, not react with copper |
| 01/12/1999 | US5859469 Use of tungsten filled slots as ground plane in integrated circuit structure |
| 01/12/1999 | US5859467 Integrated circuit memory devices having improved supply line connections, and methods of forming same |
| 01/12/1999 | US5859466 Semiconductor device having a field-shield device isolation structure and method for making thereof |
| 01/12/1999 | US5859460 Tri-state read-only memory device and method for fabricating the same |
| 01/12/1999 | US5859459 Semiconductor memory device and method of manufacturing the same |
| 01/12/1999 | US5859457 High-voltage isolated high output impedance NMOS |
| 01/12/1999 | US5859456 Programmable integrated circuits utilizing lateral double diffused metal oxide semiconductor technology |
| 01/12/1999 | US5859455 Non-volatile semiconductor memory cell with control gate and floating gate and select gate located above the channel |
| 01/12/1999 | US5859454 Nonvolatile memory device |
| 01/12/1999 | US5859453 Flash EEPROM cell and method of making the same |
| 01/12/1999 | US5859452 Memory cell array having improved channel characteristics |
| 01/12/1999 | US5859451 Semiconductor memory having storage capacitor connected to diffusion region through barrier layer |
| 01/12/1999 | US5859449 Semiconductor integrated circuit |
| 01/12/1999 | US5859445 Electro-optical device including thin film transistors having spoiling impurities added thereto |
| 01/12/1999 | US5859444 Semiconductor device |
| 01/12/1999 | US5859443 Insulated gate field effect transistor formed on an insulating surface |
| 01/12/1999 | US5859439 Apparatus for aligning semiconductor wafer using mixed light with different wavelengths |
| 01/12/1999 | US5859408 Apparatus for uniformly heating a substrate |
| 01/12/1999 | US5859407 Connecting board for connection between base plate and mounting board |
| 01/12/1999 | US5859162 Silicone ladder polymer and process for producing the same |
| 01/12/1999 | US5859110 Determining anti-bleed agents using computer molecular modeling to profile structurally-based variables in relation to performance |
| 01/12/1999 | US5858882 Reducing peeling and cracking of the dielectric layer in the fabrication of integrated circuits by spinning a glass layer with an oxygen plasma to prevent the polymer buildup |
| 01/12/1999 | US5858881 Using reaction vessel of silicon carbide and etching gas of chlorine fluoride |
| 01/12/1999 | US5858880 Method of treating a semi-conductor wafer |
| 01/12/1999 | US5858879 Depositing photoresist layer on semiconductor, patterning, etching, neutralizing, plasma etching |
| 01/12/1999 | US5858878 Semiconductor wafer etching method and post-etching process |
| 01/12/1999 | US5858877 Self-aligned process for making contacts to silicon substrates during the manufacture of integrated circuits therein |
| 01/12/1999 | US5858876 Simultaneous deposit and etch method for forming a void-free and gap-filling insulator layer upon a patterned substrate layer |
| 01/12/1999 | US5858875 Integrated circuits with borderless vias |
| 01/12/1999 | US5858874 Forming insulating film on substrate, forming contact hole, conductors, film, plug |
| 01/12/1999 | US5858873 Depositing an amorphous layer over the adhesion layer prevents the conductive material of the plug from contacting the adhesion layer, preventing junction leakage |
| 01/12/1999 | US5858872 Metal contact structure in semiconductor device, and a method of forming the same |
| 01/12/1999 | US5858871 Baking and curing the dielectric material inside the gap has a low density than that above interconnect lines and that in open field |
| 01/12/1999 | US5858870 Methods for gap fill and planarization of intermetal dielectrics |
| 01/12/1999 | US5858869 Method for fabricating intermetal dielectric insulation using anisotropic plasma oxides and low dielectric constant polymers |
| 01/12/1999 | US5858868 Method of manufacturing a laminated wiring structure preventing impurity diffusion therein from N+ and P+ regions in CMOS device with ohmic contact |
| 01/12/1999 | US5858867 Method of making an inverse-T tungsten gate |
| 01/12/1999 | US5858866 Geometrical control of device corner threshold |
| 01/12/1999 | US5858865 Method of forming contact plugs |
| 01/12/1999 | US5858864 Controlling the dosage and energy level of dopant to form a barrier region to prevent migration of dopant through barrier from adjacent doped region of the substrate, but insufficient to result in amorphization of single crystal lattice |
| 01/12/1999 | US5858863 Fabricating various kinds of semiconductor devices for a short period of time. |
| 01/12/1999 | US5858862 Process for producing quantum fine wire |
| 01/12/1999 | US5858861 Reducing nitride residue by changing the nitride film surface property |
| 01/12/1999 | US5858860 Forming field oxide regions in a face of a semiconductor substrate |
| 01/12/1999 | US5858859 Semiconductor device having a trench for device isolation fabrication method |
| 01/12/1999 | US5858858 Annealing methods for forming isolation trenches |
| 01/12/1999 | US5858857 Method of forming top corner rounding of shallow trenches in semiconductor substrate |
| 01/12/1999 | US5858855 Forming a polysilicon layer of a first conductivity and higher impurity over a substrate; bonding a second single crystal silicon substrate of second conductivity and high impurity; heating; vertical insulated-gate bipolar transistor |
| 01/12/1999 | US5858853 Surface of doped amorphous silicon film is dry-etched by using mask layer as a selective etching mask; changing amorphous film into polycrystalline silicon film serving as a storage electrode |
| 01/12/1999 | US5858852 Fabrication process of a stack type semiconductor capacitive element |
| 01/12/1999 | US5858851 Providing diffusion barrier whose interface with electrode is nitride film |
| 01/12/1999 | US5858850 Process of fabricating integrated heterojunction bipolar device and MIS capacitor |
| 01/12/1999 | US5858849 Self-amorphization of source/drain regions and titanium metal deposition for silicidation which is done in one step |
| 01/12/1999 | US5858848 Semiconductor fabrication employing self-aligned sidewall spacers laterally adjacent to a transistor gate |
| 01/12/1999 | US5858847 Method for a lightly doped drain structure |
| 01/12/1999 | US5858846 Preventing gate to source/drain bridging, reducing junction leakage defects in the source/drain region by depositing a layer of titanium over, implanting arsenic ions, annealing with silicon layer to form titanium silicide |
| 01/12/1999 | US5858845 Electrically conductive substrate interconnect continuity region and method of forming same with an angled implant |
| 01/12/1999 | US5858844 Method for construction and fabrication of submicron field-effect transistors by optimization of poly oxide process |
| 01/12/1999 | US5858843 Low temperature method of forming gate electrode and gate dielectric |
| 01/12/1999 | US5858842 Methods of forming combined trench and locos-based electrical isolation regions in semiconductor substrates |
| 01/12/1999 | US5858841 ROM device having memory units arranged in three dimensions, and a method of making the same |
| 01/12/1999 | US5858840 Implanting nitrogen ions in the first polysilicon layer of the cell and removing them from the area where the floating gate is to be formed |
| 01/12/1999 | US5858839 Method of making EPROM cell array using n-tank as common source |
| 01/12/1999 | US5858838 Method for increasing DRAM capacitance via use of a roughened surface bottom capacitor plate |
| 01/12/1999 | US5858837 Annealing amorphous silicon film pattern to convert to polysilicon, converting surface into hemispherical grained surface to form storage node electrode |
| 01/12/1999 | US5858835 Method for fabricating a capactior in a DRAM cell |
| 01/12/1999 | US5858834 Method for forming cylindrical capacitor lower plate in semiconductor device |
| 01/12/1999 | US5858833 Methods for manufacturing integrated circuit memory devices including trench buried bit lines |
| 01/12/1999 | US5858832 Method for forming a high areal capacitance planar capacitor |
| 01/12/1999 | US5858831 Random access memory devices |
| 01/12/1999 | US5858830 Method of making dual isolation regions for logic and embedded memory devices |
| 01/12/1999 | US5858829 Method for fabricating dynamic random access memory (DRAM) cells with minimum active cell areas using sidewall-spacer bit lines |
| 01/12/1999 | US5858828 Use of MEV implantation to form vertically modulated N+ buried layer in an NPN bipolar transistor |
| 01/12/1999 | US5858827 Method of manufacturing MOS transistor device with improved threshold value control and reduced reverse short channel effect |
| 01/12/1999 | US5858826 Method of making a blanket N-well structure for SRAM data stability in P-type substrates |
| 01/12/1999 | US5858825 Implanting phosphorus ions and boron ions into semiconductor substrate to form n-well, annealing, forming gate oxide |
| 01/12/1999 | US5858824 Method of forming fine electrode on semiconductor substrate |
| 01/12/1999 | US5858823 Selectively introducing a metal element into amorphous silicon film at different concentration to form metal silicide using laser as heat source to crystallize amorphous silicon |
| 01/12/1999 | US5858822 Method for producing semiconductor device |
| 01/12/1999 | US5858821 Method of making thin film transistors |
| 01/12/1999 | US5858820 Thin film transistor-liquid crystal display and a manufacturing method thereof |
| 01/12/1999 | US5858819 Fabrication method for a thin film semiconductor device, the thin film semiconductor device itself, liquid crystal display, and electronic device |
| 01/12/1999 | US5858818 Formation of InGaSa p-n Junction by control of growth temperature |
| 01/12/1999 | US5858816 Method for producing circuit board, for semiconductor package, having cavity for accommodating semiconductor element |
| 01/12/1999 | US5858815 Forming light, thin, compact structure having reduced size |
| 01/12/1999 | US5858814 Hybrid chip and method therefor |
| 01/12/1999 | US5858813 Chemical mechanical polishing a thin layer of metal or alloy with a slurry containing an abrasive, an oxidizing agent, and succinic acid |
| 01/12/1999 | US5858811 Method for fabricating charge coupled device (CCD) as semiconductor device of MOS structure |