Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/1999
12/07/1999US5998832 Metal oxide semiconductor device for an electro-static discharge circuit
12/07/1999US5998830 Flash memory cell
12/07/1999US5998829 Non-volatile memory device incorporating a dual channel structure
12/07/1999US5998828 Semiconductor device having nitrogen introduced in its polysilicon gate
12/07/1999US5998827 Semiconductor memory device and method of manufacturing the same
12/07/1999US5998825 Capacitor structure of semiconductor memory cell and method for fabricating capacitor structure of semiconductor memory cell
12/07/1999US5998824 Capacitor structure having a lower electrode with a rough surface, a plurality of metal layers and a nitridation treated film
12/07/1999US5998823 Complex dielectric film and semiconductor device
12/07/1999US5998822 Semiconductor integrated circuit and a method of manufacturing the same
12/07/1999US5998821 Dynamic ram structure having a trench capacitor
12/07/1999US5998819 Thin ferroelectric film element having a multi-layered thin ferroelectric film and method for manufacturing the same
12/07/1999US5998816 Sensor element with removal resistance region
12/07/1999US5998814 Semiconductor device and fabrication method thereof
12/07/1999US5998813 Component for protecting telephone line interfaces
12/07/1999US5998808 Three-dimensional integrated circuit device and its manufacturing method
12/07/1999US5998807 Semiconductor islands on dielectric
12/07/1999US5998801 Surface position detecting method, surface position adjusting apparatus and projection exposure apparatus effecting accurate positioning of a substrate
12/07/1999US5998798 Ion dosage measurement apparatus for an ion beam implanter and method
12/07/1999US5998797 Mask for electron beam exposure and electron beam drawing method
12/07/1999US5998795 Electron beam pattern-writing column
12/07/1999US5998767 Apparatus for processing a substrate wafer and method for operating same
12/07/1999US5998766 Apparatus and method for cleaning substrate surface by use of Ozone
12/07/1999US5998759 Laser processing
12/07/1999US5998522 Coating solution containing polysiloxane and solvent
12/07/1999US5998321 Have a given content of a rare earth element
12/07/1999US5998320 Aluminum nitride sintered body, metal including member, electrostatic chuck, method of producing aluminum nitride sintered body, and method of producing metal including member
12/07/1999US5998305 Removal of carbon from substrate surfaces
12/07/1999US5998304 Liquid phase deposition method for growing silicon dioxide film on III-V semiconductor substrate treated with ammonium hydroxide
12/07/1999US5998303 Semiconductor device making method
12/07/1999US5998302 Method of manufacturing semiconductor device
12/07/1999US5998301 Method and system for providing tapered shallow trench isolation structure profile
12/07/1999US5998300 Method of manufacturing a semiconductor device using antireflection coating
12/07/1999US5998299 Protection structures for the suppression of plasma damage
12/07/1999US5998297 Method of etching copper or copper-doped aluminum
12/07/1999US5998296 Method of forming contacts and vias in semiconductor
12/07/1999US5998294 Method for forming improved electrical contacts on non-planar structures
12/07/1999US5998293 Multilevel interconnect structure of an integrated circuit having air gaps and pillars separating levels of interconnect
12/07/1999US5998292 Method for making three dimensional circuit integration
12/07/1999US5998291 Attachment method for assembly of high density multiple interconnect structures
12/07/1999US5998290 Method to protect gate stack material during source/drain reoxidation
12/07/1999US5998289 Process for obtaining a transistor having a silicon-germanium gate
12/07/1999US5998288 Ultra thin spacers formed laterally adjacent a gate conductor recessed below the upper surface of a substrate
12/07/1999US5998287 Process for producing very narrow buried bit lines for non-volatile memory devices
12/07/1999US5998286 Method to grow self-aligned silicon on a poly-gate, source and drain region
12/07/1999US5998285 Self-aligned T-shaped process for deep submicron Si MOSFET's fabrication
12/07/1999US5998284 Method for manufacturing semiconductor device
12/07/1999US5998283 Silicon wafer having plasma CVD gettering layer with components/composition changing in depth-wise direction and method of manufacturing the silicon wafer
12/07/1999US5998282 Method of reducing charging damage to integrated circuits in ion implant and plasma-based integrated circuit process equipment
12/07/1999US5998281 SOI wafer and method for the preparation thereof
12/07/1999US5998280 Modified recessed locos isolation process for deep sub-micron device processes
12/07/1999US5998279 Manufacture of a shallow trench isolation device by exposing negative photoresist to increased exposure energy and chemical mechanical planarization
12/07/1999US5998278 Method of fabricating shallow trench isolation structures using a oxidized polysilicon trench mask
12/07/1999US5998277 Method to form global planarized shallow trench isolation
12/07/1999US5998276 Methods of making a SRAM cell employing substantially vertically elongated pull-up resistors and methods of making resistor constructions
12/07/1999US5998275 Method for programmable integrated passive devices
12/07/1999US5998274 Method of forming a multiple implant lightly doped drain (MILDD) field effect transistor
12/07/1999US5998273 Fabrication of semiconductor device having shallow junctions
12/07/1999US5998272 Minimizing source-drain extension region diffusion and allowing more precise control of source-drain extension region thickness over conventional processes.
12/07/1999US5998271 Source/drain zones and a doped gate electrode are simultaneously formed by drive-out from a doped layer. the dopant distribution in the source/drain zones is set by a permeable diffusion barrier at the surface of the source/drain
12/07/1999US5998270 Formation of oxynitride and polysilicon layers in a single reaction chamber
12/07/1999US5998269 Technology for high performance buried contact and tungsten polycide gate integration
12/07/1999US5998268 Manufacturing method of semiconductor device with a groove
12/07/1999US5998267 Process to manufacture high density ULSI ROM array
12/07/1999US5998266 Method of forming a semiconductor structure having laterally merged body layer
12/07/1999US5998265 Method of manufacturing EPROM device
12/07/1999US5998264 Method of forming high density flash memories with MIM structure
12/07/1999US5998263 High-density nonvolatile memory cell
12/07/1999US5998262 Method for manufacturing ETOX cell having damage-free source region
12/07/1999US5998261 Method of producing a read-only storage cell arrangement
12/07/1999US5998260 Method for manufacturing DRAM capacitor
12/07/1999US5998259 Method of fabricating dual cylindrical capacitor
12/07/1999US5998258 Method of forming a semiconductor device having a stacked capacitor structure
12/07/1999US5998257 Semiconductor processing methods of forming integrated circuitry memory devices, methods of forming capacitor containers, methods of making electrical connection to circuit nodes and related integrated circuitry
12/07/1999US5998256 Semiconductor processing methods of forming devices on a substrate, forming device arrays on a substrate, forming conductive lines on a substrate, and forming capacitor arrays on a substrate, and integrated circuitry
12/07/1999US5998255 Method of fabricating DRAM capacitor
12/07/1999US5998254 Method for creating a conductive connection between at least two zones of a first conductivity type
12/07/1999US5998253 Method of forming a dopant outdiffusion control structure including selectively grown silicon nitride in a trench capacitor of a DRAM cell
12/07/1999US5998252 Method of salicide and sac (self-aligned contact) integration
12/07/1999US5998251 Process and structure for embedded DRAM
12/07/1999US5998250 Compound electrode stack capacitor
12/07/1999US5998249 Static random access memory design and fabrication process featuring dual self-aligned contact structures
12/07/1999US5998248 Fabrication of semiconductor device having shallow junctions with tapered spacer in isolation region
12/07/1999US5998247 Process to fabricate the non-silicide region for electrostatic discharge protection circuit
12/07/1999US5998246 Self-aligned manufacturing method of a thin film transistor for forming a single-crystal bottom-gate and an offset drain
12/07/1999US5998244 Memory cell incorporating a chalcogenide element and method of making same
12/07/1999US5998243 Method for manufacturing semiconductor device and apparatus for resin-encapsulating
12/07/1999US5998242 Vacuum assisted underfill process and apparatus for semiconductor package fabrication
12/07/1999US5998241 Semiconductor device and method of manufacturing the same
12/07/1999US5998238 Method of fabricating semiconductor device
12/07/1999US5998236 Process for controlled orientation of ferroelectric layers
12/07/1999US5998234 Method of producing semiconductor device by dicing
12/07/1999US5998229 Methods of manufacturing thin film transistors and liquid crystal displays by plasma treatment of undoped amorphous silicon
12/07/1999US5998228 Method of testing semiconductor
12/07/1999US5998226 Method and system for alignment of openings in semiconductor fabrication
12/07/1999US5998225 Method of fabricating an oxygen-stable layer/diffusion barrier/poly bottom electrode structure for high-K DRAMs using disposable-oxide processing
12/07/1999US5998104 Downstream ashing method for removing organic resist from a semiconductor wafer; subjecting a gas plasma containing o2 and water vapor to electromagnetic power
12/07/1999US5998100 A thin resist is formed on the antireflective film and the resist is then patterned. the substrate is fabricated using the patterned resist as a mask.
12/07/1999US5998099 Energy-sensitive resist material and a process for device fabrication using an energy-sensitive resist material
12/07/1999US5998092 Water soluble negative-working photoresist composition
12/07/1999US5998068 Reticle and pattern formation method
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