Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/1999
12/14/1999US6001739 Forming organic insulating film of low dielectric constant on surface of silicon wafer, forming a photoresist film on insulating film, exposing photoresist film to light to form pattern, reacting silicon compound, reactive ion etching
12/14/1999US6001738 Overcoating substrate with dielectrics; doping; etching
12/14/1999US6001737 Method of forming a semiconductor device having a titanium salicide shallow junction diffusion layer
12/14/1999US6001736 Method of manufacturing semiconductor device and an apparatus for manufacturing the same
12/14/1999US6001735 Dual damascene technique
12/14/1999US6001734 Formation method of contact/ through hole
12/14/1999US6001733 Method of forming a dual damascene with dummy metal lines
12/14/1999US6001732 Method of fabricating a metal wiring line
12/14/1999US6001731 Isolation dielectric deposition in multi-polysilicon chemical-mechanical polishing process
12/14/1999US6001730 Chemical mechanical polishing (CMP) slurry for polishing copper interconnects which use tantalum-based barrier layers
12/14/1999US6001729 Contact structure has conductive zones of high melting point metal
12/14/1999US6001728 Method and apparatus for improving film stability of halogen-doped silicon oxide films
12/14/1999US6001727 Method of making a semiconductor device
12/14/1999US6001726 Overcoating with electroconductive material
12/14/1999US6001725 Laser wire bonding for wire embedded dielectrics to integrated circuits
12/14/1999US6001724 Method for forming bumps on a semiconductor die using applied voltage pulses to an aluminum wire
12/14/1999US6001723 Application of wire bond loop as integrated circuit package component interconnect
12/14/1999US6001722 Selective metallization/deposition for semiconductor devices
12/14/1999US6001721 Silicide and salicide on the same chip
12/14/1999US6001720 Forming dielectric on semiconductor; masking; doping; heat treatment
12/14/1999US6001719 Methods of forming metal silicide layers having insulator-filled recesses therein
12/14/1999US6001718 Semiconductor device having a ternary compound low resistive electrode
12/14/1999US6001717 Method of making local interconnections for dynamic random access memory (DRAM) circuits with reduced contact resistance and reduced mask set
12/14/1999US6001716 Fabricating method of a metal gate
12/14/1999US6001715 Annealing and electrically activation
12/14/1999US6001714 Method and apparatus for manufacturing polysilicon thin film transistor
12/14/1999US6001713 Multilayer; dielectric, barriers, doping with nitrogen, forming high temperature oxide
12/14/1999US6001712 Forming gate insulating film, then electrode by vapor deposition
12/14/1999US6001711 Doping, annealing
12/14/1999US6001710 MOSFET device having recessed gate-drain shield and method
12/14/1999US6001709 Local oxidation of silicon
12/14/1999US6001708 Method for fabricating a shallow trench isolation structure using chemical-mechanical polishing
12/14/1999US6001707 Method for forming shallow trench isolation structure
12/14/1999US6001706 Method for making improved shallow trench isolation for semiconductor integrated circuits
12/14/1999US6001705 Process for realizing trench structures
12/14/1999US6001704 In silicon wafer; forming oxide, nitride; patterning,etching
12/14/1999US6001702 Metal to metal capacitor and method for producing same
12/14/1999US6001701 Process for making bipolar having graded or modulated collector
12/14/1999US6001700 Method and mask structure for self-aligning ion implanting to form various device structures
12/14/1999US6001699 Highly selective etch process for submicron contacts
12/14/1999US6001698 MOS transistor and fabrication process for the same
12/14/1999US6001697 Process for manufacturing semiconductor devices having raised doped regions
12/14/1999US6001696 Trench isolation methods including plasma chemical vapor deposition and lift off
12/14/1999US6001695 Method to form ultra-short channel MOSFET with a gate-side airgap structure
12/14/1999US6001694 Manufacturing method for integrated circuit dielectric layer
12/14/1999US6001692 Method of fabricating trench MOS
12/14/1999US6001691 Method of manufacturing a triple level ROM
12/14/1999US6001690 Method of forming flash EPROM by using iso+aniso silicon nitride spacer etching technology
12/14/1999US6001689 Process for fabricating a flash memory with dual function control lines
12/14/1999US6001688 Method of eliminating poly stringer in a memory device
12/14/1999US6001687 Patterning, etching
12/14/1999US6001686 Method of fabricating a capacitor over a bit line of a DRAM
12/14/1999US6001685 Method of making a semiconductor device
12/14/1999US6001684 Method for forming a capacitor
12/14/1999US6001683 Formation method of interconnection in semiconductor device
12/14/1999US6001682 Method of fabricating cylinder capacitors
12/14/1999US6001681 Method to reduce the depth of a buried contact trench by using a thin split polysilicon thickness
12/14/1999US6001679 Method for manufacturing polysilicon load
12/14/1999US6001678 Insulated gate semiconductor device
12/14/1999US6001677 Method for fabricating CMOS transistors by implanting into polysilicon
12/14/1999US6001676 Semiconductor integrated circuit apparatus and associated fabrication
12/14/1999US6001675 Diffusion fluorine into polycrystalline thin film
12/14/1999US6001674 Method of eliminating buried contact trench in SRAM devices
12/14/1999US6001673 Methods for packaging integrated circuit devices including cavities adjacent active regions
12/14/1999US6001672 Method for transfer molding encapsulation of a semiconductor die with attached heat sink
12/14/1999US6001671 Methods for manufacturing a semiconductor package having a sacrificial layer
12/14/1999US6001670 Lead frame supplying method
12/14/1999US6001669 Method for producing II-VI compound semiconductor epitaxial layers having low defects
12/14/1999US6001660 Methods of forming integrated circuit capacitors using metal reflow techniques
12/14/1999US6001541 Forming dielectric; then absorber; etching
12/14/1999US6001539 Method for manufacturing liquid crystal display
12/14/1999US6001538 Damage free passivation layer etching process
12/14/1999US6001537 Method of forming a layer having a high precision pattern and layer
12/14/1999US6001511 Exposure mask having a thickness profile for controlling the amount of charged particles per unit area passing through the mask; forms a uniform pattern on a semiconductor wafer by correcting a proximity effect
12/14/1999US6001493 First and second pattern of bumps (solder balls) arranged so during a transfer process, only the first pattern bumps are transferred to pad extensions of device; second bumps can be transferred to another device; use in making electronics
12/14/1999US6001461 Electronic parts and manufacturing method thereof
12/14/1999US6001420 Filling high aspect ratio vias, holes and contacts in a substrate by deposition of a metal interconnect layer.
12/14/1999US6001418 Spin coating method and apparatus for liquid carbon dioxide systems
12/14/1999US6001417 Resist coating method and resist coating apparatus
12/14/1999US6001415 Via with barrier layer for impeding diffusion of conductive material from via into insulator
12/14/1999US6001414 Dual damascene processing method
12/14/1999US6001269 Composite is polished in a standard polishing machine using an aqueous slurry comprising submicron abrasive particles, potassium iodate and hydrogen peroxide and a base to adjust the ph of used slurry
12/14/1999US6001267 Plasma enchanced chemical method
12/14/1999US6001238 Method for purifying pure water and an apparatus for the same
12/14/1999US6001234 Methods for plating semiconductor workpieces using a workpiece-engaging electrode assembly with sealing boot
12/14/1999US6001227 Target for use in magnetron sputtering of aluminum for forming metallization films having low defect densities and methods for manufacturing and using such target
12/14/1999US6001224 Enhanced reactive DC sputtering system
12/14/1999US6001216 Apparatus and methods for rerecirculating etching solution during semiconductor wafer processing
12/14/1999US6001215 Semiconductor nitride film etching system
12/14/1999US6001191 Filling vessel having wafer boat with washing liquid; dipping substrates held by chucks in washing liquid; trasnferring substrates to boats; discharging liquid; supplying fresh washing liquid; taking washed substrates out of vessel
12/14/1999US6001189 Method for reducing gaseous species of contamination in wet processes
12/14/1999US6001187 Releasing cleaning liquid from first container of kit into applicator to be used for cleaning; removing applicator from second container and utilizing applicator for cleaning
12/14/1999US6001182 Waferless boat used as baffle during wafer processing
12/14/1999US6001180 Semiconductor wafer holder with CVD silicon carbide film coating
12/14/1999US6001173 Method of forming a compound semiconductor film
12/14/1999US6001172 Apparatus and method for the in-situ generation of dopants
12/14/1999US6001170 Process and apparatus for the growth of single crystals
12/14/1999US6001008 Abrasive dresser for polishing disc of chemical-mechanical polisher
12/14/1999US6001007 Template used for polishing a semiconductor wafer
12/14/1999US6000996 Grinding process monitoring system and grinding process monitoring method
1 ... 5598 5599 5600 5601 5602 5603 5604 5605 5606 5607 5608 5609 5610 5611 5612 5613 5614 5615 5616 5617 5618 ... 6590