Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/1999
12/21/1999US6005269 DRAM cell with a double-crown shaped capacitor
12/21/1999US6005268 Integrated circuitry, DRAM cells, capacitors, and methods of forming integrated circuitry, DRAM cells and capacitors
12/21/1999US6005267 MES/MIS FET with split-gate RF input
12/21/1999US6005265 Semiconductor integrated circuit device having wiring layout for small amplitude signals
12/21/1999US6005264 Microelectronic integrated circuit including hexagonal CMOS "NAND" gate device
12/21/1999US6005261 Semiconductor device with a junction termination and a method for production thereof
12/21/1999US6005253 Scanning energy implantation
12/21/1999US6005250 Illumination deflection system for E-beam projection
12/21/1999US6005248 Method for observing a reaction process by transmission electron microscopy
12/21/1999US6005226 Rapid thermal processing (RTP) system with gas driven rotating substrate
12/21/1999US6005225 Thermal processing apparatus
12/21/1999US6005217 Microwave plasma processing method for preventing the production of etch residue
12/21/1999US6004974 Tricyclic 5,6-dihydro-9h-pyrazolo[3,4-c]-1,2,4-triazolo[4,3-α]pyridines
12/21/1999US6004887 Semiconductor device with improved adhesion between titanium-based metal wiring layer and insulation film
12/21/1999US6004886 Liquid phase deposition method for forming silicon dioxide film on HGCDTE or other II-VI semiconductor substrate
12/21/1999US6004884 Etching through aluminum and titanium nitride layers; flowing polymer forming nitrogen and trifluoromethane
12/21/1999US6004883 Dual damascene patterned conductor layer formation method without etch stop layer
12/21/1999US6004882 Method for etching Pt film of semiconductor device
12/21/1999US6004881 Oxidation, removal, etching and rinsing in cycles; resolution
12/21/1999US6004880 Polishing integrated circuit while concurrently applying voltage; electrolysis
12/21/1999US6004879 Siliciding, oxidation; doping; heat resistance
12/21/1999US6004878 Forming phosphorus doped silicon dioxide or nitride sidewall spacer; depositing metal; siliciding; etching spacers
12/21/1999US6004877 Nitriding; high speed thermal annealing
12/21/1999US6004876 Low resistance interconnect for a semiconductor device and method of fabricating the same
12/21/1999US6004875 Etch stop for use in etching of silicon oxide
12/21/1999US6004874 Method for forming an interconnect
12/21/1999US6004873 Method for reducing the pattern sensitivity of ozone assisted chemical vapor deposited (CVD) silicon oxide insulator layers
12/21/1999US6004872 Vapor depositing titanium using high frequency plasma of low density; reacting with silicon substrate to form titanium silicide; siliciding; etching
12/21/1999US6004871 Implant enhancement of titanium silicidation
12/21/1999US6004870 Method for forming a self-aligned contact
12/21/1999US6004869 Method for making a low resistivity electrode having a near noble metal
12/21/1999US6004868 Method for CMOS well drive in a non-inert ambient
12/21/1999US6004867 Chip-size packages assembled using mass production techniques at the wafer-level
12/21/1999US6004866 Method for manufacturing bonded wafer and bonded wafer manufactured thereby
12/21/1999US6004865 Method of fabricating multi-layered structure having single crystalline semiconductor film formed on insulator
12/21/1999US6004864 Ion implant method for forming trench isolation for integrated circuit devices
12/21/1999US6004863 Non-polishing sacrificial layer etchback planarizing method for forming a planarized aperture fill layer
12/21/1999US6004862 Core array and periphery isolation technique
12/21/1999US6004861 Process for making a discontinuous source/drain formation for a high density integrated circuit
12/21/1999US6004860 SOI substrate and a method for fabricating the same
12/21/1999US6004859 Method for fabricating a stack capacitor
12/21/1999US6004858 Methods of forming hemispherical grained silicon (HSG-Si) capacitor structures including protective layers
12/21/1999US6004857 Method to increase DRAM capacitor via rough surface storage node plate
12/21/1999US6004856 Manufacturing process for a raised capacitor electrode
12/21/1999US6004855 Process for producing a high performance bipolar structure
12/21/1999US6004854 Method of forming CMOS integrated circuitry
12/21/1999US6004853 Method to improve uniformity and the critical dimensions of a DRAM gate structure
12/21/1999US6004852 Manufacture of MOSFET having LDD source/drain region
12/21/1999US6004851 Method for manufacturing MOS device with adjustable source/drain extensions
12/21/1999US6004850 Tantalum oxide anti-reflective coating (ARC) integrated with a metallic transistor gate electrode and method of formation
12/21/1999US6004849 Doping with arsenic; stripping photoresist, oxidation, implanting phosphorus, depositing conforming spacer, anisotropic etching; siliciding refractory metal
12/21/1999US6004848 Method of forming a multi-level memory array with channel bias algorithm
12/21/1999US6004847 Process for forming an integrated circuit comprising non-volatile memory cells and side transistors and corresponding IC
12/21/1999US6004846 Method for manufacturing DRAM capacitor using hemispherical grained silicon
12/21/1999US6004845 Method for fabricating a crown-shaped capacitor
12/21/1999US6004844 Unit cell layout and transfer gate design for high density DRAMs
12/21/1999US6004843 Process for integrating a MOS logic device and a MOS memory device on a single semiconductor chip
12/21/1999US6004842 Method of making a DRAM with a transfer transistor
12/21/1999US6004841 Fabrication process for MOSFET devices and a reproducible capacitor structure
12/21/1999US6004840 Method of fabricating a semiconductor device comprising a MOS portion and a bipolar portion
12/21/1999US6004839 Semiconductor device with conductive plugs
12/21/1999US6004836 Method for fabricating a film transistor
12/21/1999US6004835 Method of forming integrated circuitry, conductive lines, a conductive grid, a conductive network, an electrical interconnection to anode location and an electrical interconnection with a transistor source/drain region
12/21/1999US6004833 Method for constructing a leadless array package
12/21/1999US6004831 Method for fabricating a thin film semiconductor device
12/21/1999US6004829 Method of increasing end point detection capability of reactive ion etching by adding pad area
12/21/1999US6004828 Semiconductor processing workpiece support with sensory subsystem for detection of wafers or other semiconductor workpieces
12/21/1999US6004827 Integrated circuit processing
12/21/1999US6004730 Method of forming an insulating film pattern and photosensitive composition
12/21/1999US6004729 Increasing a surface roughness
12/21/1999US6004721 Positive photoresist composition
12/21/1999US6004701 Method for designing Levenson photomask
12/21/1999US6004700 Membrane mask for electron beam lithography
12/21/1999US6004653 Planarization process by applying a polish-differentiating technique utilizing an ultraviolet-light sensitive organic oxide layer
12/21/1999US6004632 Method for increasing etch removal rate of silicon oxynitride
12/21/1999US6004631 Apparatus and method of removing unnecessary matter and coating process using such method
12/21/1999US6004622 Spin-on-glass process with controlled environment
12/21/1999US6004406 Silicon on insulating substrate
12/21/1999US6004405 Wafers with crystal orientation
12/21/1999US6004402 Method of cleaning silicon material with a sponge
12/21/1999US6004401 Liquid circulation for cleaning, overflows, drain tubes for drainage, shields and overflows with turbulence
12/21/1999US6004399 Decontamination of particles from surface oxides on semiconductors
12/21/1999US6004397 TEOS-O3 oxidizing film depositing system and process for supplying ozone (O3) thereto
12/21/1999US6004396 Spherical shaped semiconductor integrated circuit
12/21/1999US6004392 Ferroelectric capacitor and manufacturing the same using bismuth layered oxides
12/21/1999US6004188 Method for forming copper damascene structures by using a dual CMP barrier layer
12/21/1999US6004187 Method and apparatus for measuring film thickness and film thickness distribution during polishing
12/21/1999US6004137 Method of making graded channel effect transistor
12/21/1999US6004047 Method of and apparatus for processing photoresist, method of evaluating photoresist film, and processing apparatus using the evaluation method
12/21/1999US6003863 Apparatus and method for conveying a flexible sheet through manufacturing processes
12/21/1999US6003828 Means for supporting a mask
12/21/1999US6003757 Apparatus for transferring solder bumps and method of using
12/21/1999US6003753 Air-blow solder ball loading system for micro ball grid arrays
12/21/1999US6003674 Method and apparatus for packing contaminant-sensitive articles and resulting package
12/21/1999US6003655 Lead frame separating and conveying apparatus
12/21/1999US6003595 Constant-temperature liquid-circulating apparatus
12/21/1999US6003586 Heat-sinking structures and electrical sockets for use therewith
12/21/1999US6003527 Cleaning semiconductor substrate (semiconductor wafer), liquid crystal glass substrate, or magnetic disk
12/21/1999US6003526 Cleaning a plasma etch chamber
12/21/1999US6003369 Method for manufacturing encapsulated semiconductor devices
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