Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2000
05/23/2000US6066572 Method of removing carbon contamination on semiconductor substrate
05/23/2000US6066571 Method of preparing semiconductor surface
05/23/2000US6066570 Method and apparatus for preventing formation of black silicon on edges of wafers
05/23/2000US6066569 Dual damascene process for metal layers and organic intermetal layers
05/23/2000US6066568 Plasma treatment method and system
05/23/2000US6066567 Removing a silicon oxynitride bottom antireflective coating, in-situ, during a resistor protect etching process using a plasma formed with carbon tetrafluoride, chloroform and argon gas
05/23/2000US6066566 High selectivity collar oxide etch processes
05/23/2000US6066565 Method of manufacturing a semiconductor wafer
05/23/2000US6066564 Indirect endpoint detection by chemical reaction
05/23/2000US6066563 Method for manufacturing semiconductor device
05/23/2000US6066562 Method for fabricating silicon semiconductor discrete wafer
05/23/2000US6066561 Apparatus and method for electrical determination of delamination at one or more interfaces within a semiconductor wafer
05/23/2000US6066560 Forming a trench in semiconductor substrate, applying diffusion barrier on the substrate, depositing a copper layer, forming copper oxide on copper layer, planarizing the oxide layer, then depositing a diffusion barrier layer
05/23/2000US6066558 Selectively depositing aluminum into the hole by chemical vapor deposition, forming a foundation metal film on entire surface of an interlayer dielectric film including hole, forming aluminum layer, reflowing aluminum to fill hole hole
05/23/2000US6066557 Method for fabricating protected copper metallization
05/23/2000US6066556 Methods of fabricating conductive lines in integrated circuits using insulating sidewall spacers and conductive lines so fabricated
05/23/2000US6066555 Method for eliminating lateral spacer erosion on enclosed contact topographies during RF sputter cleaning
05/23/2000US6066554 Depositing a silicide layer on the silicon substrate, covering the silicide layer with refractory metal nitride layer, depositing metal wire layer on nitride layer, heating to form a diffusion barrier layer between silicide and nitride
05/23/2000US6066553 Semiconductor processing method of forming electrically conductive interconnect lines and integrated circuitry
05/23/2000US6066552 Method and structure for improved alignment tolerance in multiple, singularized plugs
05/23/2000US6066551 Method for forming bump of semiconductor device
05/23/2000US6066550 Forming a pad oxide layer on a substrate, covering it with silicon nitride layer, doping boron ions into silcon nitride layer to transform a portion of silicon nitride as boron nitride layer, forming a silicon oxide layer and polishing
05/23/2000US6066549 Semiconductor processing method of forming a conductive gate line and semiconductor processing method of making ohmic contact between a transistor gate line and a substrate diffusion region
05/23/2000US6066548 Advance metallization process
05/23/2000US6066547 Single step heating to dope nickel ions in amorphous silicon, to form polycrystalline film
05/23/2000US6066546 Method to minimize particulate induced clamping failures
05/23/2000US6066545 Birdsbeak encroachment using combination of wet and dry etch for isolation nitride
05/23/2000US6066544 Isolation regions and methods of forming isolation regions
05/23/2000US6066543 Method of manufacturing a gap filling for shallow trench isolation
05/23/2000US6066542 Method for the manufacture of a power semiconductor component
05/23/2000US6066541 Method for fabricating a cylindrical capacitor
05/23/2000US6066540 Method for manufacturing a capacitor of a semiconductor device
05/23/2000US6066539 Honeycomb capacitor and method of fabrication
05/23/2000US6066538 Methods and apparatus for forming integrated circuit capacitors having composite oxide-nitride-oxide dielectric layers therein
05/23/2000US6066537 Method for fabricating a shielded multilevel integrated circuit capacitor
05/23/2000US6066536 Method of manufacturing a variable capacitor
05/23/2000US6066535 Method of manufacturing semiconductor device
05/23/2000US6066534 Method of manufacturing a field effect transistor
05/23/2000US6066533 MOS transistor with dual metal gate structure
05/23/2000US6066532 Method of fabricating embedded gate electrodes
05/23/2000US6066531 Method for manufacturing semiconductor memory device
05/23/2000US6066530 Oxygen implant self-aligned, floating gate and isolation structure
05/23/2000US6066529 Method for enlarging surface area of a plurality of hemi-spherical grains on the surface of a semiconductor chip
05/23/2000US6066528 Method for forming a capacitor compatible with high dielectric constant materials having two independent insulative layers
05/23/2000US6066527 Buried strap poly etch back (BSPE) process
05/23/2000US6066526 Method of making trench DRAM
05/23/2000US6066525 Method of forming DRAM capacitor by forming separate dielectric layers in a CMOS process
05/23/2000US6066524 Method for fabricating SRAM cell
05/23/2000US6066523 Method for fabricating a semiconductor device having triple wells
05/23/2000US6066522 Semiconductor device and method for producing the same
05/23/2000US6066521 Method for manufacturing BiMOS device with improvement of high frequency characteristics of bipolar transistor
05/23/2000US6066520 Method of manufacturing a BiCMOS semiconductor device
05/23/2000US6066519 Semiconductor device having an outgassed oxide layer and fabrication thereof
05/23/2000US6066518 Method of manufacturing semiconductor devices using a crystallization promoting material
05/23/2000US6066517 Method for forming a thin film transistor
05/23/2000US6066516 Method for forming crystalline semiconductor layers, a method for fabricating thin film transistors, and method for fabricating solar cells and active matrix liquid crystal devices
05/23/2000US6066513 Process for precise multichip integration and product thereof
05/23/2000US6066509 Method and apparatus for underfill of bumped or raised die
05/23/2000US6066508 Treating a semiconductor integrated circuit wafer, as housed in a reaction furnace, in a hydrogen gas, discharging hydrogen gas form outside of the furnace, converting hydrogen into water by treating the gas with oxidation catalyst
05/23/2000US6066507 Method to form an insulative barrier useful in field emission displays for reducing surface leakage
05/23/2000US6066386 Printed circuit board with cavity for circuitization
05/23/2000US6066366 Method for depositing uniform tungsten layers by CVD
05/23/2000US6066361 Method for coating a filament
05/23/2000US6066358 Blanket-selective chemical vapor deposition using an ultra-thin nucleation layer
05/23/2000US6066306 Silicon single crystal wafer having few crystal defects, and method RFO producing the same
05/23/2000US6066267 Etching of silicon nitride
05/23/2000US6066266 In-situ chemical-mechanical polishing slurry formulation for compensation of polish pad degradation
05/23/2000US6066265 Micromachined silicon probe for scanning probe microscopy
05/23/2000US6066231 Laminating device for joining a metal strip and an insulating material strip
05/23/2000US6066210 Substrate processing apparatus with a processing chamber, transfer chamber, intermediate holding chamber, and an atmospheric pressure section
05/23/2000US6066209 Cold trap
05/23/2000US6066196 Method for the chemical vapor deposition of copper-based films and copper source precursors for the same
05/23/2000US6066180 Automatic generation of phase shift masks using net coloring
05/23/2000US6066179 Property estimation of an integrated circuit
05/23/2000US6066177 Method and apparatus for calculating delay for logic circuit and method of calculating delay data for delay library
05/23/2000US6066031 Wafer chamfering method and apparatus
05/23/2000US6066030 Electroetch and chemical mechanical polishing equipment
05/23/2000US6066028 Polishing of copper
05/23/2000US6065986 Socket for semiconductor device
05/23/2000US6065667 Method and apparatus for fine pitch wire bonding
05/23/2000US6065615 Vertical wafer boat
05/23/2000US6065499 Lateral stress relief mechanism for vacuum bellows
05/23/2000US6065489 Ozone flow rate control device
05/23/2000US6065481 Direct vapor delivery of enabling chemical for enhanced HF etch process performance
05/23/2000US6065461 Ingot slicing method and apparatus therefor
05/23/2000US6065424 Electroless deposition of metal films with spray processor
05/23/2000US6065381 Apparatus for cutting tie bars of semiconductor packages
05/23/2000US6065201 Method of transferring conductive balls onto work piece
05/19/2000CA2288458A1 Resist pattern, process for the information of the same, and process forthe formation of wiring pattern
05/18/2000WO2000028654A1 Electrostatic maintaining device
05/18/2000WO2000028604A1 Indirect laser patterning of resist
05/18/2000WO2000028601A2 Lateral thin-film silicon-on-insulator (soi) device having lateral depletion
05/18/2000WO2000028599A1 Transistor array
05/18/2000WO2000028597A1 Nonvolatile memory
05/18/2000WO2000028596A1 Memory cell arrangement
05/18/2000WO2000028593A1 Method for producing a semiconductor component with wiring partly extending in the substrate and semiconductor component produced according to said method
05/18/2000WO2000028589A1 A plastic package having an air cavity and manufacturing method thereof
05/18/2000WO2000028588A1 Multi-electrode electrostatic chuck having fuses in hollow cavities
05/18/2000WO2000028587A1 Processing device
05/18/2000WO2000028586A2 Copper chemical-mechanical polishing process using a fixed abrasive polishing pad and a copper layer chemical-mechanical polishing solution specifically adapted for chemical-mechanical polishing with a fixed abrasive pad