Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2000
05/16/2000US6063694 Field-effect transistor with a trench isolation structure and a method for manufacturing the same
05/16/2000US6063693 Planar trenches
05/16/2000US6063692 Forming thin film outwardly from semiconductor substrate and separated from substrate by primary insulator layer, in-situ forming reactive layer outwardly from thin film, reacting reactive layer with outer surface of film to form silicide
05/16/2000US6063691 Shallow trench isolation (STI) fabrication method for semiconductor device
05/16/2000US6063690 Method for making recessed field oxide for radiation hardened microelectronics
05/16/2000US6063689 Method for forming an isolation
05/16/2000US6063688 Fabrication of deep submicron structures and quantum wire transistors using hard-mask transistor width definition
05/16/2000US6063687 Formation of trench isolation for active areas and first level conductors
05/16/2000US6063686 Method of manufacturing an improved SOI (silicon-on-insulator) semiconductor integrated circuit device
05/16/2000US6063684 Method for eliminating residual oxygen contaminations from crucible-drawn silicon wafers
05/16/2000US6063683 Method of fabricating a self-aligned crown-shaped capacitor for high density DRAM cells
05/16/2000US6063682 Ultra-shallow p-type junction having reduced sheet resistance and method for producing shallow junctions
05/16/2000US6063681 Silicide formation using two metalizations
05/16/2000US6063680 MOSFETS with a recessed self-aligned silicide contact and an extended source/drain junction
05/16/2000US6063679 Spacer formation for graded dopant profile having a triangular geometry
05/16/2000US6063678 Fabrication of lateral RF MOS devices with enhanced RF properties
05/16/2000US6063677 Method of forming a MOSFET using a disposable gate and raised source and drain
05/16/2000US6063676 Mosfet with raised source and drain regions
05/16/2000US6063675 Method of forming a MOSFET using a disposable gate with a sidewall dielectric
05/16/2000US6063674 Method for forming high voltage device
05/16/2000US6063673 Transistor device structures, and methods for forming such structures
05/16/2000US6063672 NMOS electrostatic discharge protection device and method for CMOS integrated circuit
05/16/2000US6063671 Method of forming a high-voltage device
05/16/2000US6063670 Gate fabrication processes for split-gate transistors
05/16/2000US6063669 Manufacturing method of semiconductor memory device having a trench gate electrode
05/16/2000US6063668 Poly I spacer manufacturing process to eliminate polystringers in high density nand-type flash memory devices
05/16/2000US6063667 Method for reducing the capacitance across the layer of tunnel oxide of an electrically-erasable programmable read-only-memory cell
05/16/2000US6063666 RTCVD oxide and N2 O anneal for top oxide of ONO film
05/16/2000US6063665 Method for silicon surface control for shallow junction formation
05/16/2000US6063664 Method of making EEPROM with trenched structure
05/16/2000US6063663 Method for manufacturing a native MOS P-channel transistor with a process for manufacturing non-volatile memories
05/16/2000US6063662 Methods for forming a control gate apparatus in non-volatile memory semiconductor devices
05/16/2000US6063661 Method for forming a bottom polysilicon electrode of a stacked capacitor for DRAM
05/16/2000US6063660 Fabricating method of stacked type capacitor
05/16/2000US6063659 Method of forming a high-precision linear MOS capacitor using conventional MOS device processing steps
05/16/2000US6063658 Methods of making a trench storage DRAM cell including a step transfer device
05/16/2000US6063657 Method of forming a buried strap in a DRAM
05/16/2000US6063656 Cell capacitors, memory cells, memory arrays, and method of fabrication
05/16/2000US6063655 Junction high electron mobility transistor-heterojunction bipolar transistor (JHEMT-HBT) monolithic microwave integrated circuit (MMIC) and single growth method of fabrication
05/16/2000US6063654 Fabricating a semiconductor device which allows the defects at the crystal boundary of silicon film crystallized from amorphous silicon film to be passivated without using the hydrogen plasma treatment
05/16/2000US6063653 Method of fabricating a TFT-LCD
05/16/2000US6063652 Silicon-on-insulator semiconductor device improving electrostatic discharge protection capability and fabrication method thereof
05/16/2000US6063649 Device mounting a semiconductor element on a wiring substrate and manufacturing method thereof
05/16/2000US6063648 Lead formation usings grids
05/16/2000US6063647 Method for making circuit elements for a z-axis interconnect
05/16/2000US6063646 Method for production of semiconductor package
05/16/2000US6063645 Method for integrated mass flow controller fabrication
05/16/2000US6063642 Method for generating luminescence from a buried layer in a multilayer compound semiconductor material using a liquid contact
05/16/2000US6063641 Method of measuring electrical characteristics of semiconductor circuit in wafer state and semiconductor device for the same
05/16/2000US6063639 Method for fabricating ferroelectric capacitor of nonvolatile semiconductor memory device using plasma
05/16/2000US6063549 Comprising an acid-generating compound, a film-forming binder having groups cleavable by acid catalysis, a compound with latent aromatic groups and a film-forming binder with latent aromatic groups
05/16/2000US6063548 Method for making DRAM using a single photoresist masking step for making capacitors with node contacts
05/16/2000US6063547 Allows easier bottom antireflective coating photoresist removal and better planarization and line width control over topography; heating the polymer in a vacuum to vaporize and deposit as a thin film of uniform thickness
05/16/2000US6063545 Comprising a sulfonated polyhydroxy-substited benzene to generate a strong acid using actinic radiation, a compound having two groups crosslinkable by means of acid and a binder insoluble in water or soluble/swellable in aqueous alkaline
05/16/2000US6063543 Radiation-sensitive mixture and its use
05/16/2000US6063529 Overlay accuracy measurement mark
05/16/2000US6063514 Gas-tight article and a producing process thereof
05/16/2000US6063506 Interconnection for electrical connections consisting of copper alloys containing an alloying element selected from carbon and/or indium for improved electromigration resistance, low resistivity and good corrosion resistance
05/16/2000US6063443 Vapor deposition
05/16/2000US6063441 Vapor deposition
05/16/2000US6063440 Method for aligning a wafer
05/16/2000US6063439 Casing, rotary table, supply mechanism
05/16/2000US6063356 Introducing a flow of hydrogen fluoride vapor comprising a low concentration of arsenic into an ionic purifier containing high purity water which contacts the flow of hydrogen fluoride, and dischrges high purity hydrogen fluroide
05/16/2000US6063306 Chemical mechanical polishing slurry useful for copper/tantalum substrate
05/16/2000US6063300 Method of manufacturing semiconductor device including light etching
05/16/2000US6063277 Contactors and microporous membranes with shells having fluoropolymers
05/16/2000US6063246 Membrane is used in ion projection lithography, by itself or as part of a lithography stencil mask
05/16/2000US6063236 Vacuum processing system and method of removing film deposited on inner face of vacuum vessel in the vacuum processing system
05/16/2000US6063235 Gas discharge apparatus for wafer etching systems
05/16/2000US6063233 Thermal control apparatus for inductively coupled RF plasma reactor having an overhead solenoidal antenna
05/16/2000US6063232 Method and apparatus for etching an edge face of a wafer
05/16/2000US6063207 Corroded by the etching plasma containing fluorine during the etching process. the bonding pad is rinsed with deionized water comprising carbon dioxide to reduce the effects of the corrosion phenomenon.
05/16/2000US6063205 Lapping a surface of a silicon wafer; cleaning and passivating the lapped wafer surface with a solution consisting essentially of an aqueous hydrogen peroxide solution
05/16/2000US6063203 Susceptor for plasma CVD equipment and process for producing the same
05/16/2000US6063201 Effusion cell assembly for epitaxial apparatus
05/16/2000US6063200 Three-dimensional micro fabrication device for filamentary substrates
05/16/2000US6063199 Temperature controlled liner
05/16/2000US6063196 Semiconductor processing chamber calibration tool
05/16/2000US6063185 Production of bulk single crystals of aluminum nitride, silicon carbide and aluminum nitride: silicon carbide alloy
05/16/2000US6063140 Process for manufacturing a metallized film capacitor
05/16/2000US6063139 Apparatus for continuous assembly of a semiconductor lead frame package
05/16/2000US6062968 Polishing pad for a semiconductor substrate
05/16/2000US6062959 Polishing system including a hydrostatic fluid bearing support
05/16/2000US6062954 Semiconductor wafer surface flattening apparatus
05/16/2000US6062953 Wafer positioning method and apparatus
05/16/2000US6062952 Planarization process with abrasive polishing slurry that is selective to a planarized surface
05/16/2000US6062873 Socket for chip package test
05/16/2000US6062869 Method of making a stacked thin film assembly
05/16/2000US6062853 Heat-treating boat for semiconductor wafers
05/16/2000US6062852 Substrate heat-treating apparatus
05/16/2000US6062808 Clean transfer method and apparatus therefor
05/16/2000US6062798 Multi-level substrate processing apparatus
05/16/2000US6062795 Wafer ring feeding apparatus
05/16/2000US6062551 Active vibration-isolating device
05/16/2000US6062460 Apparatus for producing an electronic circuit
05/16/2000US6062459 Wire bond clamp
05/16/2000US6062381 Cleaning device and method
05/16/2000US6062288 Processing apparatus
05/16/2000US6062241 Substrate conveying device and substrate conveying method
05/16/2000US6062240 Treatment device