| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 05/30/2000 | US6069096 Operating method of vacuum processing system and vacuum processing system |
| 05/30/2000 | US6069095 Ultra-clean wafer chuck assembly for moisture-sensitive processes conducted in rapid thermal processors |
| 05/30/2000 | US6069094 Method for depositing a thin film |
| 05/30/2000 | US6069093 Process of forming metal films and multi layer structure |
| 05/30/2000 | US6069092 Etching silicon dioxide surface within heated chemical reactor using fluorohydrocarbon plasma generated by applying a radio frequency power to the lower electrode supporting the substrate |
| 05/30/2000 | US6069091 Etching with first fluorocarbon/bromine compound source gas mixture and then with second gas mixture containing also achlorine compound to form smooth sidewall profile silicon layers for microelectronic circuits |
| 05/30/2000 | US6069090 Method and apparatus for semiconductor device fabrication |
| 05/30/2000 | US6069089 Defective semiconductor redistribution labeling system |
| 05/30/2000 | US6069088 Method for prolonging life time of a plasma etching chamber |
| 05/30/2000 | US6069087 Highly selective dry etching process |
| 05/30/2000 | US6069086 Non-HBr shallow trench isolation etch process |
| 05/30/2000 | US6069085 Slurry filling a recess formed during semiconductor fabrication |
| 05/30/2000 | US6069084 Method of forming a low-k layer in an Integrated circuit |
| 05/30/2000 | US6069083 Polishing substrate surface having a stop film underlying material to be polished away using slurry of abrasive particles composed of same material as stop film |
| 05/30/2000 | US6069082 Method to prevent dishing in damascene CMP process |
| 05/30/2000 | US6069081 Two-step chemical mechanical polish surface planarization technique |
| 05/30/2000 | US6069080 Fixed abrasive polishing system for the manufacture of semiconductor devices, memory disks and the like |
| 05/30/2000 | US6069079 Exposure of desired node in a multi-layer integrated circuit using FIB and RIE |
| 05/30/2000 | US6069078 Multi-level interconnect metallization technique |
| 05/30/2000 | US6069077 Curing patterned photoresist mask so that it can withstand higher than normal wafer temperatures during etching of silicon dioxide layer |
| 05/30/2000 | US6069076 Method of making a semiconductor device with changeable interconnection |
| 05/30/2000 | US6069075 Reducing reflectivity on a semiconductor wafer by annealing aluminum and titanium |
| 05/30/2000 | US6069074 Method of forming conductor shielding to prevent arcing effect during contact implant process |
| 05/30/2000 | US6069073 Method for forming diffusion barrier layers |
| 05/30/2000 | US6069072 CVD tin barrier layer for reduced electromigration of aluminum plugs |
| 05/30/2000 | US6069071 Method of manufacturing an interconnect by dissolving an intermetallic compound film into a main component of a metal film |
| 05/30/2000 | US6069070 Multilevel interconnections of electronic components |
| 05/30/2000 | US6069069 Method for planarizing a low dielectric constant spin-on polymer using nitride etch stop |
| 05/30/2000 | US6069068 Sub-quarter-micron copper interconnections with improved electromigration resistance and reduced defect sensitivity |
| 05/30/2000 | US6069066 Method of forming bonding pad |
| 05/30/2000 | US6069065 Increasing a bond strength with solder when performing wiring through soldering. |
| 05/30/2000 | US6069063 Method to form polysilicon resistors shielded from hydrogen intrusion |
| 05/30/2000 | US6069062 Methods for forming shallow junctions in semiconductor wafers |
| 05/30/2000 | US6069061 Method for forming polysilicon gate |
| 05/30/2000 | US6069060 Method of manufacturing a semiconductor device having a single crystal silicon electrode |
| 05/30/2000 | US6069059 Well-drive anneal technique using preplacement of nitride films for enhanced field isolation |
| 05/30/2000 | US6069058 Shallow trench isolation for semiconductor devices |
| 05/30/2000 | US6069057 Method for fabricating trench-isolation structure |
| 05/30/2000 | US6069056 Method of forming isolation structure |
| 05/30/2000 | US6069055 Fabricating method for semiconductor device |
| 05/30/2000 | US6069054 Method for forming isolation regions subsequent to gate formation and structure thereof |
| 05/30/2000 | US6069053 Formation of conductive rugged silicon |
| 05/30/2000 | US6069052 Process and structure for increasing capacitance of stack capacitor |
| 05/30/2000 | US6069051 Method of producing planar metal-to-metal capacitor for use in integrated circuits |
| 05/30/2000 | US6069049 Shrink-wrap collar from DRAM deep trenches |
| 05/30/2000 | US6069048 Reduction of silicon defect induced failures as a result of implants in CMOS and other integrated circuits |
| 05/30/2000 | US6069047 Method of making damascene completely self aligned ultra short channel MOS transistor |
| 05/30/2000 | US6069046 Transistor fabrication employing implantation of dopant into junctions without subjecting sidewall surfaces of a gate conductor to ion bombardment |
| 05/30/2000 | US6069045 Method of forming C49-structure tungsten-containing titanium salicide structure |
| 05/30/2000 | US6069044 Process to fabricate ultra-short channel nMOSFETS with self-aligned silicide contact |
| 05/30/2000 | US6069043 Method of making punch-through field effect transistor |
| 05/30/2000 | US6069042 Multi-layer spacer technology for flash EEPROM |
| 05/30/2000 | US6069041 Process for manufacturing non-volatile semiconductor memory device by introducing nitrogen atoms |
| 05/30/2000 | US6069040 Fabricating a floating gate with field enhancement feature self-aligned to a groove |
| 05/30/2000 | US6069038 Method of manufacturing a semiconductor integrated circuit device |
| 05/30/2000 | US6069037 Method of manufacturing embedded DRAM |
| 05/30/2000 | US6069036 Method of fabricating semiconductor device |
| 05/30/2000 | US6069035 Techniques for etching a transition metal-containing layer |
| 05/30/2000 | US6069034 DMOS architecture using low N-source dose co-driven with P-body implant compatible with E2 PROM core process |
| 05/30/2000 | US6069033 Method of manufacturing a non-volatile memory and a CMOS transistor |
| 05/30/2000 | US6069032 Salicide process |
| 05/30/2000 | US6069031 Process to form CMOS devices with higher ESD and hot carrier immunity |
| 05/30/2000 | US6069030 CMOSFET and method for fabricating the same |
| 05/30/2000 | US6069029 Semiconductor device chip on lead and lead on chip manufacturing |
| 05/30/2000 | US6069028 Technique for attaching die to leads |
| 05/30/2000 | US6069027 Fixture for lid-attachment for encapsulated packages |
| 05/30/2000 | US6069026 Semiconductor device and method of fabrication |
| 05/30/2000 | US6069024 Method for producing a semiconductor device |
| 05/30/2000 | US6069023 Attaching heat sinks directly to flip chips and ceramic chip carriers |
| 05/30/2000 | US6069021 Boron phosphide buffer layers |
| 05/30/2000 | US6069019 Method of manufacturing transistor array |
| 05/30/2000 | US6069018 Method for manufacturing a cathode tip of electric field emission device |
| 05/30/2000 | US6069017 Method for real-time in-line testing of semiconductor wafers |
| 05/30/2000 | US6068971 Process for determination of ions in fluids by masking of interfering ions |
| 05/30/2000 | US6068964 Method for patterning an insulator film and installing a grounding pin through electron beam irradiation |
| 05/30/2000 | US6068952 Second pattern consists of a plurality of said first patterns so that it receives the same influence of aberration as said first pattern when irradiated with light. |
| 05/30/2000 | US6068928 Forming a primary silicon structure in an amorphous or polycrystalline form, and doping the structure with an oxygen-containing dopant in a concentration exceeding the solubility limit. heat treatment to form dopant precipitations |
| 05/30/2000 | US6068923 Use of argon sputtering to modify surface properties by thin film deposition |
| 05/30/2000 | US6068884 Method of making low κ dielectric inorganic/organic hybrid films |
| 05/30/2000 | US6068881 For applying a liquid as a coating on a substrate; avoids use of solvent to clean the back surface of the substrate |
| 05/30/2000 | US6068879 Adding slurry with corrosion inhibitor on the polishing pad and polishing the partially fabricated integrated circuit surface which had corrosion inhibitor previously seeped into seams of metal plug |
| 05/30/2000 | US6068818 Electronic device for performing active biological operations; and methods for manufacture of such devices containing active electrodes especially adapted for electrophoretic transport of nucleic acids, their hybridization and analysis |
| 05/30/2000 | US6068788 Mixture of a phenyl sulfonate, hydrogen fluoride and water |
| 05/30/2000 | US6068787 Chemical mechanical polishing; mixture of catalyst and stabilizer |
| 05/30/2000 | US6068784 In vacuum; inductive coupling; controlling temperature |
| 05/30/2000 | US6068727 Apparatus and method for separating a stiffener member from a flip chip integrated circuit package substrate |
| 05/30/2000 | US6068704 Transfer arm apparatus and semiconductor processing system using the same |
| 05/30/2000 | US6068703 Gas mixing apparatus and method |
| 05/30/2000 | US6068699 Apparatus for fabricating semiconductor single crystal |
| 05/30/2000 | US6068690 Precursor solution for forming thin film of ferroelectric substance and production process thereof |
| 05/30/2000 | US6068685 Semiconductor manufacturing system with getter safety device |
| 05/30/2000 | US6068669 Compliant interconnect for testing a semiconductor die |
| 05/30/2000 | US6068668 A clean fabrication environment where manufacturing apparatus is streamline, operative space is maximized and operator interface is facilitated; having a sensor activated extensible shuttle housed where an outer door is closed flush |
| 05/30/2000 | US6068441 Substrate transfer system for semiconductor processing equipment |
| 05/30/2000 | US6068317 Device for adjusting space between chip in semiconductor chip tester |
| 05/30/2000 | US6068316 Large diameter wafer conveying system and method thereof |
| 05/30/2000 | US6068180 System, apparatus, and method for connecting a semiconductor chip to a three-dimensional leadframe |
| 05/30/2000 | US6068174 Device and method for clamping and wire-bonding the leads of a lead frame one set at a time |
| 05/30/2000 | US6068137 A carrier for supporting semiconductor wafers during washing, conveying, and transporting comprises a polybutylene naphthalate resin having tensile elongation of 100% or less and avoids contamination due to ahdesion with wafer |
| 05/30/2000 | US6068104 Device for securing a moving object at a destination |