| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 07/25/2000 | US6093937 Semiconductor thin film, semiconductor device and manufacturing method thereof |
| 07/25/2000 | US6093936 Integrated circuit with isolation of field oxidation by noble gas implantation |
| 07/25/2000 | US6093935 Transistor and method for manufacturing the same |
| 07/25/2000 | US6093934 Thin film transistor having grain boundaries with segregated oxygen and halogen elements |
| 07/25/2000 | US6093933 Method and apparatus for fabricating electronic device |
| 07/25/2000 | US6093932 Method of writing any patterns on a resist by an electron beam exposure and electron beam exposure system |
| 07/25/2000 | US6093931 Pattern-forming method and lithographic system |
| 07/25/2000 | US6093911 Vacuum heating furnace with tapered portion |
| 07/25/2000 | US6093889 Semiconductor package and mounting socket thereof |
| 07/25/2000 | US6093661 Providing nitrogen atom concentration in first gate dielectric layer effective to restrict diffusion of p-type dopant into semiconductor substrate |
| 07/25/2000 | US6093660 Inductively coupled plasma chemical vapor deposition technology |
| 07/25/2000 | US6093659 Selective area halogen doping to achieve dual gate oxide thickness on a wafer |
| 07/25/2000 | US6093658 Preventing exposed tungsten plugs from eroding during standard semiconductor fabrication by exposing to electron dose to neutralize positve charge |
| 07/25/2000 | US6093657 Fabrication process of semiconductor device |
| 07/25/2000 | US6093656 Method of minimizing dishing during chemical mechanical polishing of semiconductor metals for making a semiconductor device |
| 07/25/2000 | US6093655 Forming polymer material over at least some internal surfaces of plasma etch chamber and over at least some surfaces of semiconductor wafer, etching all polymer from chamber surfaces, leaving some on wafer |
| 07/25/2000 | US6093654 Process for forming interconnection of semiconductor device and sputtering system therefor |
| 07/25/2000 | US6093653 Etching electrode layer in plasma etching chamber using mixture of chlorine and nitrogen gases |
| 07/25/2000 | US6093652 Methods of forming insulative plugs, and oxide plug forming methods |
| 07/25/2000 | US6093651 Polish pad with non-uniform groove depth to improve wafer polish rate uniformity |
| 07/25/2000 | US6093650 Method for fully planarized conductive line for a stack gate |
| 07/25/2000 | US6093649 Polishing slurry compositions capable of providing multi-modal particle packing and methods relating thereto |
| 07/25/2000 | US6093648 Production method for a discrete structure substrate |
| 07/25/2000 | US6093647 Method to selectively electroplate conductive material into trenches |
| 07/25/2000 | US6093646 Manufacturing method for a thin film with an anti-reflection rough surface |
| 07/25/2000 | US6093645 Elimination of titanium nitride film deposition in tungsten plug technology using PE-CVD-TI and in-situ plasma nitridation |
| 07/25/2000 | US6093644 Jig for semiconductor wafers and method for producing the same |
| 07/25/2000 | US6093643 Electrically conductive projections and semiconductor processing method of forming same |
| 07/25/2000 | US6093642 Tungsten-nitride for contact barrier application |
| 07/25/2000 | US6093641 Method for fabricating semiconductor device with an increased process tolerance |
| 07/25/2000 | US6093640 Overlay measurement improvement between damascene metal interconnections |
| 07/25/2000 | US6093639 Process for making contact plug |
| 07/25/2000 | US6093638 Method of forming an electrical contact in a substrate |
| 07/25/2000 | US6093637 Forming an insulating film on a semiconductor substrate by (1) dual-frequency plasma enhanced chemical vapor deposition using a higher and lower frequency and a reactive tetraalkyl silane, (2) ozone/tetraalkoxysilane, (3) a third sio2 layer |
| 07/25/2000 | US6093636 Forming on a substrate a dielectric layer comprising decomposable polymer and thermosetting resin; heating to cure the thermosetting resin; decomposing the decomposable polymer; litographic patterning; depositing a metallic film |
| 07/25/2000 | US6093635 High-density multimetal layer semiconductor device with features of <0.25 microns; voidless interconnection pattern by filling the gaps with hydrogenpolysilsesquioxane and heat treating in an inert gas to remove water |
| 07/25/2000 | US6093634 Method of forming a dielectric layer on a semiconductor wafer |
| 07/25/2000 | US6093633 Method of making a semiconductor device |
| 07/25/2000 | US6093632 Modified dual damascene process |
| 07/25/2000 | US6093631 Dummy patterns for aluminum chemical polishing (CMP) |
| 07/25/2000 | US6093629 Method of simplified contact etching and ion implantation for CMOS technology |
| 07/25/2000 | US6093628 Ultra-low sheet resistance metal/poly-si gate for deep sub-micron CMOS application |
| 07/25/2000 | US6093627 Self-aligned contact process using silicon spacers |
| 07/25/2000 | US6093625 Apparatus for and methods of implanting desired chemical species in semiconductor substrates |
| 07/25/2000 | US6093624 Method of providing a gettering scheme in the manufacture of silicon-on-insulator (SOI) integrated circuits |
| 07/25/2000 | US6093623 Methods for making silicon-on-insulator structures |
| 07/25/2000 | US6093622 Isolation method of semiconductor device using second pad oxide layer formed through chemical vapor deposition (CVD) |
| 07/25/2000 | US6093621 Method of forming shallow trench isolation |
| 07/25/2000 | US6093620 Method of fabricating integrated circuits with oxidized isolation |
| 07/25/2000 | US6093619 Method to form trench-free buried contact in process with STI technology |
| 07/25/2000 | US6093618 Method of fabricating a shallow trench isolation structure |
| 07/25/2000 | US6093617 Process to fabricate hemispherical grain polysilicon |
| 07/25/2000 | US6093616 Method of manufacture of stacked gate MOS structure for multiple voltage power supply applications |
| 07/25/2000 | US6093615 Forming an effective titanium nitride barrier layer between the upper surface of a polysilicon plug and a platinum lower capacitor plate in a dynamic random access memory using low-pressure chemical vapor deposition and reactive sputtering |
| 07/25/2000 | US6093614 Memory cell structure and fabrication |
| 07/25/2000 | US6093613 Method for making high gain lateral PNP and NPN bipolar transistor compatible with CMOS for making BICMOS circuits |
| 07/25/2000 | US6093612 Metal oxide silicon field effect transistor (MOSFET) and fabrication method of same |
| 07/25/2000 | US6093611 Oxide liner for high reliability with reduced encroachment of the source/drain region |
| 07/25/2000 | US6093610 Self-aligned pocket process for deep sub-0.1 μm CMOS devices and the device |
| 07/25/2000 | US6093609 Method for forming semiconductor device with common gate, source and well |
| 07/25/2000 | US6093608 Source side injection programming and tip erasing P-channel split gate flash memory cell |
| 07/25/2000 | US6093607 Method of forming sharp beak of poly by oxygen/fluorine implant to improve erase speed for split-gate flash |
| 07/25/2000 | US6093606 Method of manufacture of vertical stacked gate flash memory device |
| 07/25/2000 | US6093605 Method of manufacturing a nonvolatile memory device having a program-assist plate |
| 07/25/2000 | US6093604 Method of manufacturing a flash memory device |
| 07/25/2000 | US6093603 Fabricating semiconductor memory devices with improved cell isolation |
| 07/25/2000 | US6093602 Method to form polycide local interconnects between narrowly-spaced features while eliminating stringers |
| 07/25/2000 | US6093601 Forming a planarized bottom electrode having a smooth surface to avoid current leakage; forming oxide and oxynitride layers, a photoresist pattern on the oxynitride layer and etching the two layers having different etching rate |
| 07/25/2000 | US6093600 Method of fabricating a dynamic random-access memory device |
| 07/25/2000 | US6093599 Method of manufacturing inductor device on a silicon substrate thereof |
| 07/25/2000 | US6093598 Process for exactly transferring latent images in photo-resist layer nonuniform in thickness in fabrication of semiconductor integrated circuit device |
| 07/25/2000 | US6093597 SRAM having P-channel TFT as load element with less series-connected high resistance |
| 07/25/2000 | US6093596 Method of making a resistor, method of making a diode, and SRAM circuitry and other integrated circuitry |
| 07/25/2000 | US6093595 Method of forming source and drain regions in complementary MOS transistors |
| 07/25/2000 | US6093594 CMOS optimization method utilizing sacrificial sidewall spacer |
| 07/25/2000 | US6093593 A resist protect oxide layer having a greater porosity than the oxide of the shallow trench isolation is deposited over the semiconductor substrate, the gate, and the shallow trench isolation; patterned high etch selectivity |
| 07/25/2000 | US6093592 Method of manufacturing a semiconductor apparatus having a silicon-on-insulator structure |
| 07/25/2000 | US6093591 Method of fabricating a semiconductor integrated circuit device |
| 07/25/2000 | US6093590 Method of fabricating transistor having a metal gate and a gate dielectric layer with a high dielectric constant |
| 07/25/2000 | US6093589 Methods for preventing gate oxide degradation |
| 07/25/2000 | US6093588 Process for fabricating a high voltage MOSFET |
| 07/25/2000 | US6093587 Removing part of an amorphous silicon film formed on a substrate having an insulating surface to form a region for introducing metal elements that promote crystallization of silicon, introducing metal, conducting heat treatment |
| 07/25/2000 | US6093586 Method of manufacturing a semiconductor device and a process of manufacturing a thin film transistor |
| 07/25/2000 | US6093585 High voltage tolerant thin film transistor |
| 07/25/2000 | US6093584 Method for encapsulating a semiconductor package having apertures through a sacrificial layer and contact pads |
| 07/25/2000 | US6093583 Semiconductor component and method of manufacture |
| 07/25/2000 | US6093582 Method of forming a charge coupled device with stripe layers corresponding to CCD regions |
| 07/25/2000 | US6093577 Low temperature adhesion bonding method for composite substrates |
| 07/25/2000 | US6093575 Semiconductor device and production method of a semiconductor device having a capacitor |
| 07/25/2000 | US6093520 High aspect ratio microstructures and methods for manufacturing microstructures |
| 07/25/2000 | US6093511 Method of manufacturing semiconductor device |
| 07/25/2000 | US6093508 Dual damascene structure formed in a single photoresist film |
| 07/25/2000 | US6093476 Wiring substrate having vias |
| 07/25/2000 | US6093445 Microscopic element manufacturing method and equipment for carrying out the same |
| 07/25/2000 | US6093332 Flowing etchant source gas into plasma processing chamber, gas including fluorocarbon and nonreactive gases, providing radio frequency power wave form to electrode associated with plasma processing chamber, forming plasma, depositing polymer |
| 07/25/2000 | US6093331 Backside silicon removal for face down chip analysis |
| 07/25/2000 | US6093302 Electrochemical solid phase synthesis |
| 07/25/2000 | US6093293 Magnetron sputtering source |
| 07/25/2000 | US6093280 Chemical-mechanical polishing pad conditioning systems |
| 07/25/2000 | US6093254 Method of HF-HF Cleaning |