| Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974) |
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| 05/02/2002 | WO2002034973A1 Method and device for cutting single crystals, in addition to an adjusting device and a test method for determining a crystal orientation |
| 05/02/2002 | WO2002034963A1 Device and method for plating |
| 05/02/2002 | WO2002034962A1 Device and method for electroless plating |
| 05/02/2002 | WO2002034684A1 Method for anodic bonding at low temperatures |
| 05/02/2002 | WO2002034477A2 Drive system with coaxical drive shafts for a robot arm |
| 05/02/2002 | WO2002034467A1 Polisher |
| 05/02/2002 | WO2002034455A1 Control of laser machining |
| 05/02/2002 | WO2002034451A1 Method of and structure for controlling electrode temperature |
| 05/02/2002 | WO2002034435A1 Improved passivating etchants for metallic particles |
| 05/02/2002 | WO2002017399A8 Semiconductor arrangement and method for production thereof |
| 05/02/2002 | WO2002017389A3 Disposable spacer technology for device tailoring |
| 05/02/2002 | WO2002017355A3 Semiconductor wafer container cleaning apparatus |
| 05/02/2002 | WO2002015649A3 Close coupled match structure for rf drive electrode |
| 05/02/2002 | WO2002014014A3 Chemical mechanical planarization of metal substrates |
| 05/02/2002 | WO2002013262A3 Gate technology for strained surface channel and strained buried channel mosfet devices |
| 05/02/2002 | WO2002012870A3 System and method for inspecting bumped wafers |
| 05/02/2002 | WO2002009186A3 Field effect transistor |
| 05/02/2002 | WO2002008832A3 Method for an improved developing process in wafer photolithography |
| 05/02/2002 | WO2002006898A3 Material and method for making an electroconductive pattern |
| 05/02/2002 | WO2001099194A3 Semiconductor arrangement |
| 05/02/2002 | WO2001099170A3 Ceria slurry and process for the chemical-mechanical polishing of silicon dioxide |
| 05/02/2002 | WO2001082328A3 Magnetic barrier for plasma in chamber exhaust |
| 05/02/2002 | WO2001080294A3 Mocvd-grown buffer for enhancement mode higfet |
| 05/02/2002 | WO2001059848A3 Mos-gated semiconductor device having alternating conductivity type semiconductor regions and methods of making the same |
| 05/02/2002 | WO2001055737A3 Analysis of cd-sem signal to detect scummed/closed contact holes and lines |
| 05/02/2002 | WO2001054217A3 Fuel cell and power chip technology |
| 05/02/2002 | WO2001042853A3 Photoresist composition for deep uv radiation |
| 05/02/2002 | WO2001004940A9 Method for doping gallium nitride (gan) substrates and the resulting doped gan substrate |
| 05/02/2002 | WO2001003159A9 Gas distribution apparatus for semiconductor processing |
| 05/02/2002 | WO2000078109A9 Improved bga solder ball shear strength |
| 05/02/2002 | WO2000054107A9 Step and flash imprint lithography |
| 05/02/2002 | WO2000049651A9 Improved masking methods and etching sequences for patterning electrodes of high density ram capacitors |
| 05/02/2002 | US20020053069 High-level synthesis method, high-level synthesis apparatus, method for producing logic circuit using the high-level synthesis method for logic circuit design, and recording medium |
| 05/02/2002 | US20020053065 Method, apparatus, and computer program of searching for clustering faults in semiconductor device manufacturing |
| 05/02/2002 | US20020053055 Semiconductor device having a test mode |
| 05/02/2002 | US20020053054 Method for automatically searching for and sorting failure signatures of wafers |
| 05/02/2002 | US20020052705 Testing method of semiconductor integrated circuit and equipment thereof |
| 05/02/2002 | US20020052668 Control apparatus for plasma utilizing equipment |
| 05/02/2002 | US20020052301 Cleaning solutions including nucleophilic amine compound having reduction and oxidation potentials |
| 05/02/2002 | US20020052174 Polishing apparatus, cleaning apparatus to be used for such a polishing apparatus and polishing/cleaning method as well as method of making a wiring section |
| 05/02/2002 | US20020052173 Chemical-mechanical polishing methods |
| 05/02/2002 | US20020052169 Systems and methods to significantly reduce the grinding marks in surface grinding of semiconductor wafers |
| 05/02/2002 | US20020052166 Polishing system |
| 05/02/2002 | US20020052129 Wafer probe assemblage with spring enhanced needles |
| 05/02/2002 | US20020052128 Exposing to energized deposition gas with first and second components, to deposit a first layer in the recess; and reducing the ratio of the first component to the second component, to deposit a second layer over the first layer |
| 05/02/2002 | US20020052127 Method of manufacturing anti-reflection layer |
| 05/02/2002 | US20020052126 Electro-mechanical polishing of platinum container structure |
| 05/02/2002 | US20020052125 Applying organosilicate precursor comprising curable polymers based on divinylsiloxane-bis-benzocyclobutene or hydrolyzed products of alkoxysilanes or acyloxysilanes; etch-stop layer |
| 05/02/2002 | US20020052124 In situ dielectric stacks |
| 05/02/2002 | US20020052123 Configuration of various chemical compound generators coupled to a furnace provides the environment for formation of thin oxides of silicon on a wafer; forming steam from dichloroethylene, oxygen and hydrogen |
| 05/02/2002 | US20020052122 Polypropylene and a triclosan sodium salt physically trapped within the fibers |
| 05/02/2002 | US20020052121 Using etchant mixture of an ammonium fluoride component, an inorganic acid component, and an oxidizing agent at pH of seven to eight |
| 05/02/2002 | US20020052120 Method of fabricating semiconductor device and wafer treatment apparatus employed therefor as well as semiconductor device |
| 05/02/2002 | US20020052119 In-situ flowing bpsg gap fill process using hdp |
| 05/02/2002 | US20020052118 Method for forming isolation regions on semiconductor device |
| 05/02/2002 | US20020052117 Chemical-mechanical polishing method |
| 05/02/2002 | US20020052116 Free Floating double side polishing of substrates |
| 05/02/2002 | US20020052115 Method of eliminating agglomerate particles in a polishing slurry |
| 05/02/2002 | US20020052114 Enhanced resist strip in a dielectric etcher using downstream plasma |
| 05/02/2002 | US20020052113 First etchant is used to etch through the layer in the fastest etching region, and then a second etchant is used to complete etching through the layer in the slowest etching region; microelectrical mechanical system (MEMS) applications |
| 05/02/2002 | US20020052112 Forming dielectric layer so as to provide an intrinsic etch rate which increases in the direction of thickness or depth of the dielectric layer; selectively etching to form a hole to contact a conductive area underneath; capacitors |
| 05/02/2002 | US20020052111 Method for providing pulsed plasma during a portion of a semiconductor wafer process |
| 05/02/2002 | US20020052110 Method for forming metal line in a semiconductor device |
| 05/02/2002 | US20020052109 Method and system for forming copper thin film |
| 05/02/2002 | US20020052108 Semiconductor device fabrication method |
| 05/02/2002 | US20020052107 Wiring forming method |
| 05/02/2002 | US20020052106 Method for fabricating semiconductor device |
| 05/02/2002 | US20020052105 Chip package with grease heat sink and method of making |
| 05/02/2002 | US20020052104 Semiconductor chip installing tape, semiconductor device and a method for fabricating thereof |
| 05/02/2002 | US20020052103 Method of fabricating gate |
| 05/02/2002 | US20020052102 Depositing a polysilicon film above a silicon carbide (SiC) substrate, delineating the film into a pattern, and annealing the SiC substrate in a water rich ambient to selectively grow a thermal oxide film above the SiC substrate |
| 05/02/2002 | US20020052101 Field effect transistors and methods of forming a field effect transistor |
| 05/02/2002 | US20020052100 Photomask and method for manufacturing the same |
| 05/02/2002 | US20020052099 Method of fabricating gate |
| 05/02/2002 | US20020052098 Includes anisotropic and isotropic etching steps for forming the opening within the dielectric layer, using the same etching mask; opening is formed with a stair-like profile with enlarged surface area for capacitor |
| 05/02/2002 | US20020052097 Apparatus and method for depositing thin film on wafer using atomic layer deposition |
| 05/02/2002 | US20020052096 After wet cleaning or etching of the substrate having a silicon surface, forming an oxide film by rinsing with pure water and ozone, irradiating with laser light through film; no water marks |
| 05/02/2002 | US20020052095 Method for evaluating impurity concentrations in epitaxial susceptors |
| 05/02/2002 | US20020052094 Serial wafer handling mechanism |
| 05/02/2002 | US20020052093 Method of forming insulative trench |
| 05/02/2002 | US20020052092 Method for forming a dielectric zone in a semiconductor substrate |
| 05/02/2002 | US20020052090 Method for fabricating a capacitor |
| 05/02/2002 | US20020052089 Method of manufacturing a cylindrical storage node in a semiconductor device |
| 05/02/2002 | US20020052088 Method of manufacturing photomask, photomask, and method of manufacturing semiconductor integrated circuit device |
| 05/02/2002 | US20020052087 Nitrogen atoms are introduced selectively and with a high concentration level into the region that tends to experience most severe damages during the patterning process of the gate electrode pattern |
| 05/02/2002 | US20020052086 Semiconductor device and method of manufacturing same |
| 05/02/2002 | US20020052085 Semiconductor device including gate electrode having damascene structure and method of fabricating the same |
| 05/02/2002 | US20020052084 Buried channel strained silicon FET using a supply layer created through ion implantation |
| 05/02/2002 | US20020052083 Cost effective split-gate process that can independently optimize the low voltage(LV) and high voltage (HV) transistors to minimize reverse short channel effects |
| 05/02/2002 | US20020052082 Method of fabricating cell of flash memory device |
| 05/02/2002 | US20020052081 NROM fabrication method |
| 05/02/2002 | US20020052080 Non-volatile semiconductor device with reduced program disturbance and method of making same |
| 05/02/2002 | US20020052079 Memory cell structure of flash memory having circumventing floating gate and method for fabricating the same |
| 05/02/2002 | US20020052078 A dielectric layer contacted with hydrogen, oxygen and nitrous oxide gases to form an oxidation layer over the second layer |
| 05/02/2002 | US20020052077 Low-leakage dram structures using selective silicon epitaxial growth (seg) on an insulating layer |
| 05/02/2002 | US20020052075 Method of fabricating semiconductor device |
| 05/02/2002 | US20020052074 Method of producing a Si-Ge base heterojunction bipolar device |
| 05/02/2002 | US20020052073 Semiconductor device and manufacturing method thereof |
| 05/02/2002 | US20020052072 Surface treatment method of semiconductor substrate |
| 05/02/2002 | US20020052069 Fabrication method of thin-film semiconductor device |