Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2002
05/08/2002EP1204138A1 Mounting/demounting device for wafer carrier lid
05/08/2002EP1204137A2 Semiconductor Chip Contacting Method and Apparatus
05/08/2002EP1204136A1 Package of semiconductor device and method of manufacture thereof
05/08/2002EP1204135A2 Method of forming an ultrathin SiO2 layer using N2O as the oxidant
05/08/2002EP1204134A2 RF plasma processor
05/08/2002EP1204133A2 Method and apparatus for processing a micro sample
05/08/2002EP1204119A2 Sequence circuit and semiconductor device using sequence circuit
05/08/2002EP1204002A2 EUV lithography system with thin-film coating for protection from laser-produced plasma
05/08/2002EP1203834A1 Method for forming multi-phase lead germanate film
05/08/2002EP1203833A2 Organometallic copper complex and preparation of copper thin film by cvd
05/08/2002EP1203801A2 Aqueous dispersion, process for its production and use
05/08/2002EP1203756A1 Optical glass and projection aligner using the same
05/08/2002EP1203513A2 High-speed symmetrical plasma treatment system
05/08/2002EP1203441A1 Radio frequency power source for generating an inductively coupled plasma
05/08/2002EP1203408A1 Bi-directional semiconductor component
05/08/2002EP1203407A1 Methods of forming an interlevel dielectric layer between different levels of metal layers in the fabrication of integrated circuit
05/08/2002EP1203406A1 Method of producing copper features on semiconductor wafers
05/08/2002EP1203405A2 Method for etching bismuth-containing oxide films
05/08/2002EP1203404A1 Etching solution, containing hydrofluoric acid
05/08/2002EP1203403A1 Method for transferring a thin layer comprising a step of excess fragilization
05/08/2002EP1203402A1 Exposure during rework for enhanced resist removal
05/08/2002EP1203401A1 Integrated inductive circuits
05/08/2002EP1203400A1 A thin film resistor device and a method of manufacture therefor
05/08/2002EP1203399A1 Lamp based scanning rapid thermal processing
05/08/2002EP1203398A1 Substrate and workpiece support for receiving a substrate
05/08/2002EP1203396A1 Device and method for etching a substrate using an inductively coupled plasma
05/08/2002EP1203382A1 Method for producing a magnetic tunnel contact and magnetic tunnel contact
05/08/2002EP1203378A1 Circuit implementation to quench bit line leakage current in programming and over-erase correction modes in flash eeprom
05/08/2002EP1203266A1 Flexible piezoelectric chuck
05/08/2002EP1203264A1 Apparatus and method of image enhancement through spatial filtering
05/08/2002EP1203223A1 Methods for the automated testing of reticle feature geometries
05/08/2002EP1203200A1 X-ray reflectometry measurements on patterned wafers
05/08/2002EP1203108A1 Cooled window
05/08/2002EP1202995A1 Group(iii)-metal-hydrides with a guanidino-type ligand
05/08/2002EP1034561B1 Rapid thermal processing (rtp) system with gas driven rotating substrate
05/08/2002EP1031261B1 Multiple head dispensing system and method
05/08/2002EP1010223B1 Method for treating substrates
05/08/2002EP0935256B1 Test method for writable nonvolatile semiconductor memory device
05/08/2002EP0895656B1 An image reversal technique for forming small structures in integrated circuits
05/08/2002EP0464196B1 Single transistor non-volatile electrically alterable semiconductor memory device with a re-crystallized floating gate
05/08/2002DE10150160A1 Verfahren zum Herstellrn einer Metallleitung eines Halbleiterbauteils A method for Herstellrn a metal line of a semiconductor device
05/08/2002DE10141423A1 Verfahren und Gerät zur Prüfung auf Musterfehler Method and apparatus for testing for pattern defects
05/08/2002DE10141422A1 Verfahren zur Prüfung auf Maskenfehler und Gerät zur Elektronenstrahlbelichtung Method to check for errors and mask device for electron beam exposure
05/08/2002DE10141301A1 Halbleitervorrichtung mit einer Self-Aligned-Kontaktstruktur, die Dual-Abstandshalter verwendet, und Herstellungsverfahren dafür A semiconductor device with a Self-Aligned-contact structure that uses dual-spacer, and processes for its preparation
05/08/2002DE10134018A1 Halbleitervorrichtung, die eine interne Spannung wirksam erzeugen kann A semiconductor device which can generate an internal voltage effective
05/08/2002DE10110453A1 Verfahren zum Montieren eines Halbleiterchips auf einem Substrat und auf einem Substrat montierbarer Halbleiterbaustein A method of mounting a semiconductor chip on a substrate and on a substrate mountable semiconductor module
05/08/2002DE10055101A1 Production of solder connections comprises applying a soluble galvanizing base layer to a solder surface and a passivating layer o a semiconductor wafer, applying a lacquer
05/08/2002DE10055064A1 Wafer carrier for semiconductors manufacture with robot technology, has curved section of each side part matched to shape of wafer outline
05/08/2002DE10055033A1 Device for depositing crystalline layers onto crystalline substrates has a space between a reactor housing wall and a graphite tube filled with a graphite foam notched collar
05/08/2002DE10054345A1 Wäßrige Dispersion, Verfahren zu deren Herstellung und Verwendung An aqueous dispersion, a process for their preparation and use
05/08/2002DE10054081A1 Verfahren zur Herstellung eines Metallträgerrahmens, Metallrägerrahmen und seine Verwendung A method for producing a metal support frame, and its use Metallrägerrahmen
05/08/2002DE10054070A1 Precision process to determine the position of moving wafer bench and photo mask bench relative to each other
05/08/2002DE10053899A1 Bearing system for precision optical system minimises distortion from dynamic forces
05/08/2002DE10053671A1 Self adjusting process for forming field effect transistors comprises a multiple step process in which a low ohmic connection metallization is finally applied to the source, drain and gate
05/08/2002DE10052692A1 Component handling device has at least one position of transport device in which one holding element is being loaded, one has component being tested and the other is being unloaded
05/08/2002DE10052211A1 Test arrangement for integrated circuit memory chips
05/08/2002DE10052208A1 FET-Justiertechnologie auf der Grundlage von Seitenwandabstandselementen FET Justiertechnologie on the basis of sidewall spacers
05/08/2002DE10052154A1 Verfahren und Vorrichtung zum Trennen von Einkristallen, Justiervorrichtung und Testverfahren zum Ermitteln einer Orientierung eines Einkristalls für ein derartiges Verfahren Method and apparatus for separating crystals, adjusting and testing method for determining an orientation of a single crystal for such a method
05/08/2002DE10052131A1 Vollständig selbstjustierende FET-Technologie Fully self-adjusting FET technology
05/08/2002DE10051719A1 Producing circuit structures on semiconducting substrate involves combining first dummy structure with second to exceed minimum size if envisaged structure smaller than minimum
05/08/2002DE10034085C2 Verfahren zur Erzeugung analog zueinander aufgebauter Chips, die jeweils ein erstes Halbleiterbauelement, das eine Schicht mit einer definierten elektrischen Polarisation aufweist, aufweisen A method of generating analog to each other constructed chips, each having a first semiconductor component having a layer with a defined electrical polarization,
05/08/2002CN1348609A Flexible organic electronic device with improved resistance to oxygen and moisture degradation
05/08/2002CN1348606A A method in the fabrication of organic thin-film semiconductor devices
05/08/2002CN1348604A Method of manufacturing a semiconductor device comprising semiconductor elements formed in a top layer of a silicon wafer situated on a buried insulating layer
05/08/2002CN1348603A Fabrication of gallium nitride layers by lateral growth
05/08/2002CN1348594A Method for forming transparent conductive film by using chemically amplified resist
05/08/2002CN1348552A Semiconductor wafer processing system with vertically-stacked process chambers and single-axis dual-wafer transfer system
05/08/2002CN1348328A 半导体器件和半导体模块 Semiconductor device and semiconductor module
05/08/2002CN1348255A Compound semiconductor switch circuit apparatus
05/08/2002CN1348221A Magnetic resistance apparatus and/or multi-magnetic resistance apparatus
05/08/2002CN1348220A Channel metallic-oxide-semiconductor device and terminal structure
05/08/2002CN1348219A 参考电压半导体 Reference voltage semiconductor
05/08/2002CN1348217A A semi-conductor apparatus and its forming method
05/08/2002CN1348216A Stacked semiconductor device
05/08/2002CN1348215A Radiating base plate and semiconductor module
05/08/2002CN1348214A Semiconductor device and semiconductor module
05/08/2002CN1348213A 半导体装置和半导体模块 Semiconductor device and semiconductor module
05/08/2002CN1348212A Thin packaged semi-conductor device and its producing method
05/08/2002CN1348210A Method for producing strain silicon CMOS structure with selective epitaxial precipitation
05/08/2002CN1348209A Pixel array layout method and metal wire structure for focal plane read-out circuit
05/08/2002CN1348208A Manufacturing method of semiconductor device
05/08/2002CN1348207A Method for producing semiconductor device
05/08/2002CN1348206A Resin encapsulation modle
05/08/2002CN1348205A Method for producing electric circuit device
05/08/2002CN1348204A IC packing substrate structure and its manufacture
05/08/2002CN1348203A Method for forming channel metal-oxide-semiconductor and terminal structure
05/08/2002CN1348202A Method for producing compound semi-conductor device
05/08/2002CN1348201A Manufacture of capacitor connecting structure
05/08/2002CN1348200A Method for producing thin-film, semiconductor thin film and semiconductor device
05/08/2002CN1348199A Semiconductor device and its producing method
05/08/2002CN1348190A Method and apparatus for nondestructive magnetic resistance random access storing unit of memory
05/08/2002CN1348189A Semiconductor integrated circuit apparatus
05/08/2002CN1348165A Etching liquid for indium oxide tin film
05/08/2002CN1347932A 多孔材料 The porous material
05/08/2002CN1084586C Circuit board with primary and secondary through holes
05/08/2002CN1084526C Figure working position alignment method
05/08/2002CN1084525C Cleaning apparatus and cleaning method
05/08/2002CN1084524C Silicon-on-insulator (SOI) substrate and its producing method
05/08/2002CN1084485C Optical mask with developing rate measuring pattern and method for measuring development rate uniformity
05/08/2002CN1084477C Installation testing system with cable pivot and its installing method