Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
05/2002
05/02/2002US20020052068 Dram capacitor array and integrated device array of substantially identically shaped devices
05/02/2002US20020052066 Method of manufacturing semiconductor device
05/02/2002US20020052065 Conductor posts, construction for and method of fabricating semiconductor integrated circuit chips using the conductor post, and method of probing semiconductor integrated circuit chips
05/02/2002US20020052064 Method and apparatus for processing a semiconductor wafer using novel final polishing method
05/02/2002US20020052063 Method and apparatus for packaging a microelectronic die
05/02/2002US20020052062 Layers of a conductive pattern isolated by a trench are formed on a conductive foil to form a multilayered wiring structure, a circuit is mounted and molded with an insulating resin and the back surface of the conductive foil is etched
05/02/2002US20020052061 Silicon wafer with embedded optoelectronic material for monolithic OEIC
05/02/2002US20020052060 Method for growing semiconductor layer and method for fabricating semiconductor light emitting elements
05/02/2002US20020052059 Manufacturing method of a thin film transistor
05/02/2002US20020052057 Method of fabricating thin film transistor liquid crystal display
05/02/2002US20020052056 Semiconductor device and method for fabricating the same
05/02/2002US20020052055 Non-destructive inspection method
05/02/2002US20020052053 Inspection system and semiconductor device manufacturing method
05/02/2002US20020051943 Method of manufacturing an electronic device and a semiconductor integrated circuit device
05/02/2002US20020051940 Photoresist monomer comprising bisphenol derivatives and polymers thereof
05/02/2002US20020051932 Photoresists for imaging with high energy radiation
05/02/2002US20020051916 Using a dose corresponding to the loading effect due to a desired pattern which is calculated from a relationship represented as the convolution of a Gaussian distribution and a loading density
05/02/2002US20020051832 Mold for flashless injection molding to encapsulate an integrated circuit chip
05/02/2002US20020051831 Apparatus for encasing array packages
05/02/2002US20020051731 Silicon wafer storage water and silicon wafer storage method
05/02/2002US20020051705 Position control apparatus of feeder stage in surface mount device
05/02/2002US20020051704 Pneumatically actuated flexure gripper for wafer handling robots
05/02/2002US20020051701 Device for attaching target substrate transfer container to semiconductor processing apparatus
05/02/2002US20020051700 Robot for handling workpieces in an automated processing system
05/02/2002US20020051699 Door system for a process chamber
05/02/2002US20020051698 Substrate conveying module and system made up of substrate conveying modile and workstation
05/02/2002US20020051697 Removable gripper pads
05/02/2002US20020051644 Substrate processing apparatus
05/02/2002US20020051567 Method of adjusting a lithographic tool
05/02/2002US20020051564 Method and device for optically monitoring fabrication processes of finely structured surfaces in a semiconductor production
05/02/2002US20020051473 Electronic and photonic devices having ultra-micro structures fabricated with a focused ion beam
05/02/2002US20020051402 Pattern layout of transfer transistors employed in row decoder
05/02/2002US20020051399 Semiconductor device including a fuse circuit in which the electric current is cut off after blowing so as to prevent voltage fall
05/02/2002US20020051393 Semiconductor memory provided with data-line equalizing circuit
05/02/2002US20020051390 Semiconductor device
05/02/2002US20020051382 Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein
05/02/2002US20020051381 Magnetic random access memory having voltage control circuitry for maintaining sense lines at constant low voltages
05/02/2002US20020051379 Loadless 4T SRAM cell with PMOS drivers
05/02/2002US20020051378 Semiconductor memory device and method of manufacturing the same
05/02/2002US20020051358 System and method for providing a lithographic light source for a semiconductor manufacturing process
05/02/2002US20020051333 Low voltage modular room ionization system
05/02/2002US20020051135 Apparatus for optical inspection of wafers during polishing
05/02/2002US20020051127 Method of lithography
05/02/2002US20020051126 Exposure apparatus
05/02/2002US20020051125 Scanning exposure apparatus and method
05/02/2002US20020051124 Lithographic projection apparatus, device manufacturing method and device manufactured thereby
05/02/2002US20020051123 Lithographic projection apparatus, device manufacturing method and device manufactured thereby
05/02/2002US20020051101 Liquid crystal display
05/02/2002US20020051099 Array substrate for a liquid crystal display and method for fabricating thereof
05/02/2002US20020050967 Liquid crystal display device
05/02/2002US20020050855 Semiconductor device
05/02/2002US20020050850 Voltage switching circuit
05/02/2002US20020050849 Level shift circuit and semiconductor integrated circuit
05/02/2002US20020050840 Circuit configuration and method for accelerating aging in an MRAM
05/02/2002US20020050836 Reduced terminal testing system
05/02/2002US20020050834 Apparatus and method for controlling temperature in a device under test using integrated temperature sensitive diode
05/02/2002US20020050832 Probe contact system having planarity adjustment mechanism
05/02/2002US20020050831 Probe station having multiple enclosures
05/02/2002US20020050813 Burn-in test method for a semiconductor chip and burn-in test apparatus therefor
05/02/2002US20020050804 XYZ-axes table
05/02/2002US20020050768 One-piece cleaning tank with indium bonded megasonic transducer
05/02/2002US20020050655 Method for adding features to a design layout and process for designing a mask
05/02/2002US20020050654 Method and apparatus for packaging a microelectronic die
05/02/2002US20020050653 Semiconductor devcice and its manufacturing method
05/02/2002US20020050652 Apparatus and methods of testing and assembling bumped devices using an anisotropically conductive layer
05/02/2002US20020050651 Semiconductor device and method for fabricating the same
05/02/2002US20020050650 Semiconductor device and method for making the same
05/02/2002US20020050649 Metal interconnect layer of semiconductor device and method for forming a metal interconnect layer
05/02/2002US20020050648 Semiconductor device and method for fabricating the same
05/02/2002US20020050647 Semiconductor device and method of manufacturing the same
05/02/2002US20020050646 Semiconductor device having dummy interconnection and method for manufacturing the same
05/02/2002US20020050645 Method of forming dual damascene structure
05/02/2002US20020050644 Electrode structure and method for fabricating the same
05/02/2002US20020050643 Conductive adhesive agent, packaging structrue, and method for manufacturing the same structure
05/02/2002US20020050642 Semiconductor device and method of manufacturing the same
05/02/2002US20020050638 Condensed memory matrix
05/02/2002US20020050637 Semiconductor device
05/02/2002US20020050636 Semiconductor device and its manufacturing method
05/02/2002US20020050634 Semiconductor device with stacked memory and logic substrates and method for fabricating the same
05/02/2002US20020050631 Semiconductor device and method for fabricating the same
05/02/2002US20020050630 Protective envelope for a semiconductor integrated circuit
05/02/2002US20020050629 Semiconductor passivation deposition process for interfacial adhesion
05/02/2002US20020050628 Metallization structures for microelectronic applications and process for forming the structures
05/02/2002US20020050627 Contact structure for semiconductor devices and corresponding manufacturing process
05/02/2002US20020050626 Semiconductor device and manufacturing method therefor
05/02/2002US20020050624 Mechanical resistance of a single-crystal silicon wafer
05/02/2002US20020050621 Method and device to reduce gate-induced drain leakage (GIDL) current in thin gate oxide MOSFETs
05/02/2002US20020050620 Semiconductor integrated circuit device having capacitor element
05/02/2002US20020050619 MOS transistor having an offset region
05/02/2002US20020050618 Semiconductor device and manufacturing method thereof
05/02/2002US20020050617 Semiconductor device
05/02/2002US20020050614 Body-tied-to-source partially depleted SOI MOSFET
05/02/2002US20020050613 High-voltage transistor with multi-layer conduction region
05/02/2002US20020050612 Semiconductor device including a nonvolatile memory-cell array, and method of manufacturing the same
05/02/2002US20020050609 Non-volatile memory device and fabrication method thereof
05/02/2002US20020050608 Novel gate dielectric
05/02/2002US20020050607 Nonvolatile semiconductor memory
05/02/2002US20020050605 Method to reduce contact distortion in devices having silicide contacts
05/02/2002US20020050604 Compound semiconductor device
05/02/2002US20020050603 Semiconductor device