Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2002
10/15/2002US6465797 Electron beam illumination apparatus, electron beam exposure apparatus, and device manufacturing method
10/15/2002US6465796 Charge-particle beam lithography system of blanking aperture array type
10/15/2002US6465782 Strongly textured atomic ridges and tip arrays
10/15/2002US6465768 MOS structure with improved substrate-triggered effect for on-chip ESD protection
10/15/2002US6465765 Fluid heating apparatus
10/15/2002US6465763 Outflow of heat to supporting case is suppressed, making the temperature of its ceramic substrate uniform; used mainly to heat a semiconductor wafer.
10/15/2002US6465761 Heat lamps for zone heating
10/15/2002US6465747 Microelectronic assemblies having solder-wettable pads and conductive elements
10/15/2002US6465743 Multi-strand substrate for ball-grid array assemblies and method
10/15/2002US6465734 Resin sealed semiconductor device, circuit member for use therein and method of manufacturing circuit member
10/15/2002US6465733 Electronic package structure utilizing aluminum nitride/aluminum composite material
10/15/2002US6465732 Laser formation of a metal capacitor and integrated coaxial line
10/15/2002US6465727 Photovoltaic element and method of manufacturing the same
10/15/2002US6465403 Silicate-containing alkaline compositions for cleaning microelectronic substrates
10/15/2002US6465375 Single electron MOSFET memory device and method
10/15/2002US6465374 Method of surface preparation
10/15/2002US6465373 Combines depositing a dichlorosilane nitride seeding layer with depositing a tetrachlorosilane nitride layer on a silicon-comprising substrate to improve the thickness of a dielectric silicon nitride layer deposited
10/15/2002US6465372 Thermal chemical vapor deposition using an organosilane to form carbon-doped silicon oxide layer which is subsequently cured and densified
10/15/2002US6465371 Atomic layer deposition (ald) using zirconium tetra-tert-butoxide as a zirconium source material instead of conventional zrcl4, so resulting film is chlorine-free
10/15/2002US6465370 Low leakage, low capacitance isolation material
10/15/2002US6465369 Method for stabilizing semiconductor degas temperature
10/15/2002US6465368 Dissolving polymer in solvent; forming dielectric films
10/15/2002US6465366 Dual frequency plasma enhanced chemical vapor deposition of silicon carbide layers
10/15/2002US6465365 Method of improving adhesion of cap oxide to nanoporous silica for integrated circuit fabrication
10/15/2002US6465364 Method for fabrication of a contact plug in an embedded memory
10/15/2002US6465363 Vacuum processing method and vacuum processing apparatus
10/15/2002US6465362 Method for forming gate of semiconductor device
10/15/2002US6465361 Method for preventing damage of low-k dielectrics during patterning
10/15/2002US6465360 Method for fabricating an ultra small opening
10/15/2002US6465359 Using as treatment gas octafluoropentane
10/15/2002US6465358 Post etch clean sequence for making a semiconductor device
10/15/2002US6465357 Fabricating structures using chemo-mechanical polishing and chemically-selective endpoint detection
10/15/2002US6465356 Method for forming fine patterns by thinning developed photoresist patterns using oxygen radicals
10/15/2002US6465354 Method of improving the planarization of wiring by CMP
10/15/2002US6465353 Process of thinning and blunting semiconductor wafer edge and resulting wafer
10/15/2002US6465352 Method for removing dry-etching residue in a semiconductor device fabricating process
10/15/2002US6465351 Method of forming a capacitor lower electrode using a CMP stopping layer
10/15/2002US6465350 Aluminum nitride thin film formation on integrated circuits
10/15/2002US6465349 Nitrogen-plasma treatment for reduced nickel silicide bridging
10/15/2002US6465348 Method of fabricating an MOCVD titanium nitride layer utilizing a pulsed plasma treatment to remove impurities
10/15/2002US6465347 Tungsten film forming method
10/15/2002US6465346 Conducting line of semiconductor device and manufacturing method thereof using aluminum oxide layer as hard mask
10/15/2002US6465345 Prevention of inter-channel current leakage in semiconductors
10/15/2002US6465344 Crystal thinning method for improved yield and reliability
10/15/2002US6465343 Method for forming backend interconnect with copper etching and ultra low-k dielectric materials
10/15/2002US6465342 Semiconductor device and its manufacturing method
10/15/2002US6465341 Manufacturing method for semiconductor interconnect barrier of boron silicon nitride
10/15/2002US6465340 Via filled dual damascene structure with middle stop layer and method for making the same
10/15/2002US6465339 Technique for intralevel capacitive isolation of interconnect paths
10/15/2002US6465338 Method of planarizing die solder balls by employing a die's weight
10/15/2002US6465337 Methods of fabricating integrated circuit bonding pads including intermediate closed conductive layers having spaced apart insulating islands therein
10/15/2002US6465335 Method of manufacturing semiconductor device
10/15/2002US6465334 Enhanced electroless deposition of dielectric precursor materials for use in in-laid gate MOS transistors
10/15/2002US6465333 Method of manufacturing a circuit
10/15/2002US6465332 Method of making MOS transistor with high doping gradient under the gate
10/15/2002US6465331 DRAM fabricated on a silicon-on-insulator (SOI) substrate having bi-level digit lines
10/15/2002US6465330 Method for grinding a wafer back
10/15/2002US6465329 Microcircuit die-sawing protector and method
10/15/2002US6465328 Semiconductor wafer manufacturing method
10/15/2002US6465327 Method for producing a thin membrane and resulting structure with membrane
10/15/2002US6465326 Methods of forming field oxide and active area regions on a semiconductor substrate
10/15/2002US6465325 Process for depositing and planarizing BPSG for dense trench MOSFET application
10/15/2002US6465324 Recessed silicon oxidation for devices such as a CMOS SOI ICs
10/15/2002US6465323 Method for forming semiconductor integrated circuit microelectronic fabrication having multiple gate dielectric layers with multiple thicknesses
10/15/2002US6465321 Method of forming a storage node in a semiconductor device
10/15/2002US6465320 Electronic component and method of manufacturing
10/15/2002US6465319 Aluminum-filled self-aligned trench for stacked capacitor structure and methods
10/15/2002US6465318 Bipolar transistor and method for producing same
10/15/2002US6465317 Process for producing a bipolar transistor with self-aligned emitter and extrinsic base
10/15/2002US6465316 SOI substrate and semiconductor device
10/15/2002US6465315 MOS transistor with local channel compensation implant
10/15/2002US6465314 Semiconductor processing methods
10/15/2002US6465313 SOI MOSFET with graded source/drain silicide
10/15/2002US6465312 CMOS transistor with amorphous silicon elevated source-drain structure and method of fabrication
10/15/2002US6465311 Method of making a MOSFET structure having improved source/drain junction performance
10/15/2002US6465310 Methods of forming self-aligned contact pads on electrically conductive lines
10/15/2002US6465309 Silicide gate transistors
10/15/2002US6465308 Tunable threshold voltage of a thick field oxide ESD protection device with a N-field implant
10/15/2002US6465307 Method for manufacturing an asymmetric I/O transistor
10/15/2002US6465306 Simultaneous formation of charge storage and bitline to wordline isolation
10/15/2002US6465304 Method for fabricating a power semiconductor device having a floating island voltage sustaining layer
10/15/2002US6465303 Method of manufacturing spacer etch mask for silicon-oxide-nitride-oxide-silicon (SONOS) type nonvolatile memory
10/15/2002US6465302 Method of manufacturing a flash memory device
10/15/2002US6465301 Method for fabricating capacitor of semiconductor device
10/15/2002US6465300 Patterning a dielectric; forming silicide
10/15/2002US6465299 Semiconductor memory and method for fabricating the same
10/15/2002US6465298 Method of fabricating a semiconductor-on-insulator memory cell with buried word and body lines
10/15/2002US6465297 Method of manufacturing a semiconductor component having a capacitor
10/15/2002US6465296 Vertical source/drain contact semiconductor
10/15/2002US6465295 Method of fabricating a semiconductor device
10/15/2002US6465294 Self-aligned process for a stacked gate RF MOSFET device
10/15/2002US6465293 Method of manufacturing a flash memory cell
10/15/2002US6465292 Method of manufacturing a semiconductor device having reduced power consumption without a reduction in the source/drain breakdown voltage
10/15/2002US6465291 High-voltage transistor with buried conduction layer
10/15/2002US6465290 Method of manufacturing a semiconductor device using a polymer film pattern
10/15/2002US6465289 Method of fabricating monolithic multifunction integrated circuit devices
10/15/2002US6465288 Method of manufacturing a semiconductor device using a crystalline semiconductor film
10/15/2002US6465287 Method for fabricating a semiconductor device using a metal catalyst and high temperature crystallization
10/15/2002US6465286 Method of fabricating an imager array
10/15/2002US6465285 Liquid crystal device, liquid crystal display panel and method for manufacturing the same
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