Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2002
10/17/2002WO2001056744A9 Endpoint monitoring with polishing rate change
10/17/2002WO2000007215A3 A method of allowing a stable power transmission into a plasma processing chamber
10/17/2002US20020152456 Software and hardware simulation
10/17/2002US20020152452 Illumination optimization for specific mask patterns
10/17/2002US20020152451 Method and apparatus for minimizing optical proximity effects
10/17/2002US20020152448 Layout of semiconductor integrated circuit
10/17/2002US20020152059 Semiconductor process parameter determining method, semiconductor process parameter determining system, and semiconductor process parameter determining program
10/17/2002US20020152055 Design support system and design support method for multi-chip package
10/17/2002US20020151627 Adhesive and electric device
10/17/2002US20020151425 Synthetic quartz glass optical material and optical member for f2 excimer lasers
10/17/2002US20020151259 Polishing apparatus
10/17/2002US20020151257 Carrier head for holding a wafer and allowing processing on a front face thereof to occur
10/17/2002US20020151256 Apparatus for edge polishing uniformity control
10/17/2002US20020151254 Apparatus and methods for aligning a surface of an active retainer ring with a wafer surface for chemical mechanical polishing
10/17/2002US20020151253 Polishing pad and method of use thereof
10/17/2002US20020151252 Polishing composition and polishing method employing it
10/17/2002US20020151228 Self-coplanarity bumping shape for flip chip
10/17/2002US20020151191 Semiconductor processing methods of transferring patterns from patterned Photoresists to materials, and structures comprising silicon nitride
10/17/2002US20020151190 Semiconductor device having a multilayer interconnection structure
10/17/2002US20020151189 Chip scale package with flip chip interconnect
10/17/2002US20020151188 Silicon nitride and silicon dioxide gate insulator transistors and method of forming same in a hybrid integrated circuit
10/17/2002US20020151187 Method of relieving surface tension on a semiconductor wafer
10/17/2002US20020151186 Apparatus and method for detecting an end point of chamber cleaning in semiconductor equipment
10/17/2002US20020151185 Gas assisted method for applying resist stripper and gas-resist stripper combinations
10/17/2002US20020151184 Method for increased workpiece throughput
10/17/2002US20020151183 Etching; t-shaped; uniformity; integrated circuits; semiconductors
10/17/2002US20020151182 Focused Ion beam etching of copper with variable pixel spacing
10/17/2002US20020151181 Optical substrate having alignment fiducials
10/17/2002US20020151180 Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride
10/17/2002US20020151179 Method of forming minimally spaced word lines
10/17/2002US20020151177 Method of reducing in-trench smearing during polishing
10/17/2002US20020151176 Use of residual organic compounds to facilitate gate break on a carrier substrate for a semiconductor device
10/17/2002US20020151175 Manufacturing method of semiconductor device
10/17/2002US20020151174 Wiring line assembly and method for manufacturing the same, and thin film transistor array substrate having the wiring line assembly and method for manufacturing the same
10/17/2002US20020151171 Semiconductor device and manufacturing method therefor, circuit substrate, and electronic apparatus
10/17/2002US20020151170 Method of forming polycrystalline CoSi2 salicide and products obtained thereof
10/17/2002US20020151169 Semiconductor chip, semiconductor device, circuit board and electronic equipment and production methods for them
10/17/2002US20020151168 Low k dielectric etch in high density plasma etcher
10/17/2002US20020151167 Method for forming a copper interconnect using a multi-platen chemical mechanical polishing (CMP) process
10/17/2002US20020151166 Integrated circuits having reduced step height by using dummy conductive lines
10/17/2002US20020151165 Advanced interconnection for integrated circuits
10/17/2002US20020151164 Structure and method for depositing solder bumps on a wafer
10/17/2002US20020151163 Semiconductor processing methods of forming contact openings, methods of forming memory circuitry, methods of forming electrical connections, and methods of forming dynamic random access memory (DRAM) circuitry
10/17/2002US20020151162 Method of producing a capacitor electrode with a barrier structure
10/17/2002US20020151161 Method for forming conductive film pattern, and electro-optical device and electronic apparatus
10/17/2002US20020151160 Semiconductor processing methods of transferring patterns from patterned photoresists to materials, and structures comprising silicon nitride
10/17/2002US20020151159 Methods, complexes, and system for forming metal-containing films
10/17/2002US20020151158 Method and structure for retarding high temperature agglomeration of silicides using alloys
10/17/2002US20020151157 Mask for correcting optical proximity effect and method of manufacturing the same
10/17/2002US20020151156 Process for removal of photoresist after post ion implantation
10/17/2002US20020151154 Heat treatment apparatus and heat treatment method
10/17/2002US20020151153 Carbon doped epitaxial layer for high speed CB-CMOS
10/17/2002US20020151152 Semiconductor integrated circuits and fabricating method thereof
10/17/2002US20020151151 Honeycomb capacitor and method of fabrication
10/17/2002US20020151150 Capacitor and method for forming same
10/17/2002US20020151149 Method of providing a shallow trench in a deep-trench device
10/17/2002US20020151148 Low cost fabrication of high resistivity resistors
10/17/2002US20020151147 Manufacturing of a lateral bipolar transistor
10/17/2002US20020151146 Magnetoresistance van der pauw sensor having conductive inhomogeneity embedded in semiconductor material on substrate, ratio of areas maximizes room temperature magnetoresistance, stack of thin metal layers between areas for ohmic contact
10/17/2002US20020151145 Sacrificial polysilicon sidewall process and rapid thermal spike annealing for advance CMOS fabrication
10/17/2002US20020151144 Method of manufacturing a semiconductor device
10/17/2002US20020151143 Method of manufacturing semiconductor device
10/17/2002US20020151142 Thermally stable poly-Si/high dielectric constant material interfaces
10/17/2002US20020151141 Dummy structures that protect circuit elements during polishing
10/17/2002US20020151140 Exposure parameter obtaining method, exposure parameter evaluating method, semiconductor device manufacturing method, charged beam exposure apparatus, and method of the same
10/17/2002US20020151138 Method for fabricating an NROM
10/17/2002US20020151137 Method for semiconductor device planarization
10/17/2002US20020151136 Method of manufacture of vertical split gate flash memory device and device manufactured thereby
10/17/2002US20020151135 Method of reducing electrical shorts from the bit line to the cell plate
10/17/2002US20020151134 Semiconductor device manufacturing method and semiconductor device
10/17/2002US20020151133 Methods of forming hemispherical grained silicon on a template on a semiconductor work object
10/17/2002US20020151132 Micromachined electromechanical (MEM) random access memory array and method of making same
10/17/2002US20020151131 Method of forming minute pattern and method of manufacturing semiconductor device
10/17/2002US20020151130 T-RAM structure having dual vertical devices and method for fabricating the same
10/17/2002US20020151129 Method of manufacturing a semiconductor device
10/17/2002US20020151128 High-pressure anneal process for integrated circuits
10/17/2002US20020151125 Method of forming a CMOS type semiconductor device having dual gates
10/17/2002US20020151123 Phase change recording layer sandwiched between dielectric layers; metal mirror layer; thickness gradually increases, complete erasure time decreases
10/17/2002US20020151122 Method of producing semiconductor device
10/17/2002US20020151121 Laser irradiation apparatus
10/17/2002US20020151120 Method of manufacturing a semiconductor device
10/17/2002US20020151119 Flat panel display device and method of manufacturing the same
10/17/2002US20020151116 Method for manufacturing tft array substrate of liquid crystal display device
10/17/2002US20020151115 Process for production of thin film, semiconductor thin film, semiconductor device, process for production of semiconductor thin film, and apparatus for production of semiconductor thin film
10/17/2002US20020151112 Semiconductor substrate and land grid array semiconductor package using same and fabrication methods thereof
10/17/2002US20020151111 P-connection components with frangible leads and bus
10/17/2002US20020151110 Method of constructing an electronic assembly having an indium thermal couple and an electronic assembly having an indium thermal couple
10/17/2002US20020151108 Vertical source/drain contact semiconductor
10/17/2002US20020151107 Fabrication of dram and other semiconductor devices with an insulating film using a wet rapid thermal oxidation process
10/17/2002US20020151106 Thermosetting resin composition and semiconductor device using the same
10/17/2002US20020151105 Buried digit spacer-separated capacitor array
10/17/2002US20020151104 Semiconductor device and method for producing the same
10/17/2002US20020151103 Semiconductor device and method of manufacturing the same
10/17/2002US20020151102 Stacked semiconductor package structure having films and method for manufacturing the films
10/17/2002US20020151101 Containing layer of mercaptohexadecanoic acid and/or nitrobenzenethiol; electroconductivity
10/17/2002US20020151099 Method of fabricating a semiconductor device containing nitrogen in an oxide film
10/17/2002US20020151095 Method for fabricating optical devices with defectless and antireflecting spot size converter
10/17/2002US20020151091 Measuring back-side voltage of an integrated circuit
10/17/2002US20020151090 Integrated inductive circuits
10/17/2002US20020150917 Determining concentration of preferential nucleotide sequences in sample; obtain nucleotide sequences, amplify, hybridize with amplicons, detect and quantitate hybridization products
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