H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2002
10/17/2002	US20020149053 Semiconductor device and semiconductor device manufacturing method
10/17/2002	US20020149052 High-voltage transistor with buried conduction layer
10/17/2002	US20020149051 Superjunction device with self compensated trench walls
10/17/2002	US20020149050 Integrated memory cell and method of fabrication
10/17/2002	US20020149049 Semiconductor device and manufacturing method of the same
10/17/2002	US20020149048 Memory cell having a vertical transistor with buried source/drain and dual gates
10/17/2002	US20020149047 TTO nitride liner for improved collar protection and TTO reliability
10/17/2002	US20020149046 Semiconductor integrated circuit having a non-volatile semiconductor memory and a capacitor
10/17/2002	US20020149045 Semiconductor device and method of fabricating the same
10/17/2002	US20020149044 Semiconductor integrated circuit device and method of manufacturing the same
10/17/2002	US20020149043 Integrated circuit configuration having at least two capacitors and method for manufacturing an integrated circuit configuration
10/17/2002	US20020149042 Gate structure laminated with insulating film, conductor film, ferroelectric body film and second conductor film on semiconductor substrate, with low dielectric constant layer restraining layer at interface between insulator and substrate
10/17/2002	US20020149041 Ferroelectric memory and its method of fabrication
10/17/2002	US20020149040 Process for producing a strontium ruthenium oxide protective layer on a top electrode
10/17/2002	US20020149038 Semiconductor device
10/17/2002	US20020149034 Semiconductor chip and multi-chip module
10/17/2002	US20020149033 GaN HBT superlattice base structure
10/17/2002	US20020149032 Fet (field effect transistor) and high frequency module
10/17/2002	US20020149031 Semiconductor device having gate all around type transistor and method of forming the same
10/17/2002	US20020149030 Doped semiconductor material, a method of manufacturing the doped semiconductor material, and a semiconductor device
10/17/2002	US20020149028 Semiconductor light-emitting element
10/17/2002	US20020149023 Structure and method for fabricating III-V nitride devices utilizing the formation of a compliant substrate
10/17/2002	US20020149022 Silicon carbide inversion channel mosfets
10/17/2002	US20020149021 Silicon carbide and related wide-bandgap transistors on semi-insulating epitaxy for high-speed, high-power applications
10/17/2002	US20020149019 Electronic device and electronic apparatus
10/17/2002	US20020149018 Active-matrix substrate and method of fabricating same
10/17/2002	US20020149017 Active matrix display device having high intensity and high precision and manufacturing method thereof
10/17/2002	US20020149016 Semiconductor device with semiconductor circuit comprising semiconductior units, and method of fabricating it
10/17/2002	US20020149012 Semiconductor device
10/17/2002	US20020149011 Semiconductor component and corresponding fabrication method
10/17/2002	US20020148998 Potassium hypochlorite, hydrofluoric acid and deionized water
10/17/2002	US20020148997 Slurry for CMP and CMP method
10/17/2002	US20020148978 Real-time prediction of and correction of proximity resist heating in raster scan particle beam lithography
10/17/2002	US20020148977 Ion implanter
10/17/2002	US20020148976 Thermal control of image pattern distortions
10/17/2002	US20020148974 Wafer thermal desorption system and apparatus
10/17/2002	US20020148971 Lens assembly for electron beam column
10/17/2002	US20020148916 Spin, rinse, and dry station with adjustable nozzle assembly for semiconductor wafer backside rinsing
10/17/2002	US20020148897 Descriptor for identifying a defective die site and methods of formation
10/17/2002	US20020148826 Method of calibrating a semiconductor wafer drying apparatus
10/17/2002	US20020148824 Rapid thermal processing system for integrated circuits
10/17/2002	US20020148812 Method and apparatus for performing plasma process on particles
10/17/2002	US20020148811 Methods for detecting the endpoint of a photoresist stripping process
10/17/2002	US20020148810 Method for surface treatment of silicon based substrate
10/17/2002	US20020148807 Method of etching a deep trench in a substrate and method of fabricating on-chip devices and micro-machined structures using the same
10/17/2002	US20020148734 Plating system workpiece support having workpiece engaging electrode
10/17/2002	US20020148733 Wiring layer is formed through the degenerated layer including the amide group formed on the resin substrate surface and various layers including a metallic oxide layer
10/17/2002	US20020148732 Method and apparatus for electrochemically depositing a material onto a workpiece surface
10/17/2002	US20020148720 Physical vapor deposited copper is solubilized in a fluid for redistribution, which prevents inherent nonuniformity of deposited copper film thickness by improving uniformity of copper flim thickness on coverd surfaces
10/17/2002	US20020148639 Multi-layer substrates and fabrication processes
10/17/2002	US20020148630 Plastic integrated circuit package and method and leadframe for making the package
10/17/2002	US20020148570 Sample processing system
10/17/2002	US20020148566 Substrate processing unit
10/17/2002	US20020148565 Mushroom stem wafer pedestal for improved conductance and uniformity
10/17/2002	US20020148563 6685780 not granted per USPTO
10/17/2002	US20020148561 Plasma processing apparatus and method of processing
10/17/2002	US20020148560 Apparatus and method for atmospheric pressure reactive atom plasma processing for shaping of damage free surfaces
10/17/2002	US20020148534 Growing the underlying gallium nitride layer through the first array of holes in the mask; masking again with laterally offset holes and growing the gallium nitride through them; single crystal; defect-free; microelectronic devices
10/17/2002	US20020148492 High-pressure processing apparatus
10/17/2002	US20020148489 Device and process for liquid treatment of wafer-shaped articles
10/17/2002	US20020148487 Performing a post-etching cleaning step to clean the dual damascene opening using a fluorine-based organic solvent; and sputtering an argon gas to clean the opening before forming a second metal layer; corrosion resistance
10/17/2002	US20020148485 Apparatus and method for wet cleaning
10/17/2002	US20020148483 Wet etching, cleaning, rinsing integrated circuits or liquid crystal displays
10/17/2002	US20020148406 Atomizer
10/17/2002	US20020148404 Substrate spinning apparatus
10/17/2002	US20020148320 Arms of scalar robot
10/17/2002	US20020148307 Inspection system for process devices for treating substrates, sensor intended for such inspection system, and method for inspecting process devices
10/17/2002	US20020148135 Wafer heat-treatment system and wafer heat-treatment method
10/17/2002	US20020148132 Semiconductor load port alignment device
10/17/2002	US20020148112 Encapsulation method for ball grid array semiconductor package
10/17/2002	US20020148098 Auxiliary tool and method for assembling motor assembly to support wafer
10/17/2002	DE10216080A1 Semiconducting component for integrated CMOS circuit has first and second metal conductors connecting low impedance region to supply and earth connection surfaces
10/17/2002	DE10216022A1 Layout eines Halbleiter-ICs Layout of a semiconductor IC
10/17/2002	DE10216015A1 Overvoltage protection circuit for CMOS circuits has potential divider and inverter circuits and switching element formed on same substrate as protected integrated CMOS circuit
10/17/2002	DE10215960A1 Production of semiconductor wafers comprises separating a semiconductor single crystal into wafers, lapping the front and rear sides of the wafers, etching, finely grinding at least the front sides of the wafers, and polishing the wafers
10/17/2002	DE10213556A1 Semiconductor device includes gap formed between wirings on substrate and filled with gas
10/17/2002	DE10212917A1 Semiconductor integrated circuit layout method involves outputting wiring connecting terminal of circuit blocks as wiring pattern for mask manufacture, when antenna ratio is smaller than reference value
10/17/2002	DE10212657A1 Wet chemical cleaning of a silicon wafer comprises initially contacting a hydrophobic surface partially covered with polishing agent, and contacting with an aqueous solution containing an oxidant
10/17/2002	DE10211133A1 Integrierter Schaltkreis mit silizidierten ESD Schutztransistoren Integrated circuit with silicided ESD protection transistors
10/17/2002	DE10208021A1 Erhöhen der Helligkeit von Licht emittierenden III-Nitrid-Anordnungen Increasing the brightness of light emitting III-nitride devices
10/17/2002	DE10207312A1 Ferroelektrische nichtflüchtige Logikelemente A ferroelectric nonvolatile logic elements
10/17/2002	DE10160174A1 Chemical/mechanical polishing slurry, used in producing shallow trench insulation in silicon wafer with oxide and nitride coatings, comprises abrasive particles in aqueous solution containing two different passivating agents
10/17/2002	DE10147677A1 Verfahren zur Herstellung einer Halbleitervorrichtung A process for producing a semiconductor device
10/17/2002	DE10137668A1 Component used in production of integrated circuits comprises substrate, semiconductor components connected to substrate via contacts arranged between substrate and semiconductor components, and supporting bodies
10/17/2002	DE10134099A1 Production of an integrated semiconductor circuit comprises forming conducting pathways on an electrically insulating layer arranged on a semiconductor substrate, and successively forming a first and a second covering layer
10/17/2002	DE10124770C1 Process for contacting an electrical component, especially a semiconductor component, to a substrate comprises applying a connecting unit between the electrical component
10/17/2002	DE10118568A1 Production of optically transparent regions in a silicon substrate used for optical investigations of small amounts of liquid in medicine and analysis comprises etching and oxidizing the defined transparent regions in the substrate
10/17/2002	DE10118529C1 Verfahren zur Strukturierung eines aus glasartigem Material bestehenden Flächensubstrats Method for structuring a planar substrate consisting of glassy material
10/17/2002	DE10118130A1 Device for depositing crystalline layers on crystalline substrates in the gas phase comprises a heated reaction chamber with substrate holders arranged in a circular manner on a support, heated sources, and a hydride feed line
10/17/2002	DE10118048A1 Catadioptric lens used as a projection lens in semiconductor lithography comprises a beam divider partially surrounded by a holder, a mirror, lenses, a plate and an absorption unit arranged between the beam divider and the holder
10/17/2002	DE10118047A1 Catadioptric objective, especially for microlithography, has deflection mirrors with mirror surfaces arranged on common base body whose position in objective can be adjusted
10/17/2002	DE10117775A1 Power semiconductor module used in power electronics comprises a semiconductor chip arranged on a flat electrode connected to a base plate (11) via an insulating intermediate layer having air holes
10/17/2002	DE10117741A1 Verfahren zur Herstellung eines Halbleiter-Bauelements mit T-förmigen Kontaktelektrode A process for producing a semiconductor device with a T-shaped contact electrode
10/17/2002	DE10117612A1 Verfahren zum gleichzeitigen Polieren mehrerer gleichartiger Objekte, insbesondere Silizium-Wafer, auf einer Polieranlage Method for simultaneous polishing of several similar objects, in particular silicon wafer on a polishing system
10/17/2002	DE10117483A1 Halbleiterleistungsbauelement und entsprechendes Herstellungsverfahren Semiconductor power device and manufacturing method thereof
10/17/2002	DE10117306A1 Production of structured multiple layer arrangement comprises growing island structures from metallic solution on substrate or layer using liquid phase epitaxy, and growing covering layer on island structures
10/17/2002	DE10117037A1 Speicherzellenarray mit einzeln adressierbaren Speicherzellen und Verfahren zur Herstellung desselben Memory cell array of the same with individually addressable memory cells and methods for making
10/17/2002	DE10116876A1 Selbstjustierte Kontaktdotierung für organische Feldeffekttransistoren Self Tuned contact doping for organic field-effect transistors
10/17/2002	DE10116875A1 Production of an integrated ferroelectric storage device comprises depositing an intermediate oxide, forming ferroelectric capacitor module on intermediate oxide, structuring, and depositing hydrogen diffusion barrier on structured module
10/17/2002	DE10116382A1 Transport container for wafers comprises a plastic carrier body, two runner rails and several bearing elements which independently of one another are made of different plastic materials

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