H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2002
12/19/2002	WO2002077712A3 Photoresist composition
12/19/2002	WO2002069365A3 Vessel for processing microelectronic workpieces
12/19/2002	WO2002069132A3 Improved high speed data capture circuit for a digital device
12/19/2002	WO2002065552A3 Semiconductor devices and their peripheral termination
12/19/2002	WO2002065492A3 Integrated transformer
12/19/2002	WO2002061010A3 Method for adhering substrates using light activatable adhesive film
12/19/2002	WO2002043139A3 Two mask via pattern to improve pattern definition
12/19/2002	WO2002043137A3 Bump formation method and bump forming apparatus to semiconductor wafer
12/19/2002	WO2002039454A3 Magnetoresistive memory (mram)
12/19/2002	WO2002034477A3 Drive system with coaxical drive shafts for a robot arm
12/19/2002	WO2002011187A3 Method and apparatus for depositing a tantalum-containing layer on a substrate
12/19/2002	WO2001086703A9 Method and apparatus for sorting semiconductor devices
12/19/2002	WO2001078112A8 Method for charging and discharging a process tank
12/19/2002	WO2001073883A9 Low-temperature fabrication of thin-film energy-storage devices
12/19/2002	WO2001073868A9 Device enclosures and devices with integrated battery
12/19/2002	WO2001068322A9 Window portion with an adjusted rate of wear
12/19/2002	WO2000043731A9 Multiple alignment mechanisms near shared processing device
12/19/2002	US20020194576 Method of evaluating the exposure property of data to wafer
12/19/2002	US20020194574 Method for laying out electronic circuit and program thereof
12/19/2002	US20020194573 Method for simulating noise on the input of a static gate and determining noise on the output
12/19/2002	US20020194543 Enhanced embedded logic analyzer
12/19/2002	US20020194542 Debugging system for semiconductor integrated circuit
12/19/2002	US20020193959 System and method of determining the noise sensitivity characterization for an unknown circuit
12/19/2002	US20020193957 Data collection methods and apparatus with parasitic correction
12/19/2002	US20020193902 Integrating tool, module, and fab level control
12/19/2002	US20020193901 Exposure apparatus and method
12/19/2002	US20020193899 Dynamic metrology schemes and sampling schemes for advanced process control in semiconductor processing
12/19/2002	US20020193891 Apparatus for diagnosing failure in equipment using signals relating to the equipment
12/19/2002	US20020193542 Photosensitive polymer and chemically amplified photoresist composition containing the same
12/19/2002	US20020193467 Conductive materials with electrical stability for use in electronics devices
12/19/2002	US20020193451 Water and a polymer with a functional group that can react with the metal of a polishing surface
12/19/2002	US20020193051 Apparatus and method for producing substrate with electrical wire thereon
12/19/2002	US20020192986 Probe card for tester head
12/19/2002	US20020192984 Method for manufacturing semiconductor device, method for processing substrate, and substrate processing apparatus
12/19/2002	US20020192983 Method for fabricating organic thin film
12/19/2002	US20020192982 Introducing into chemical vapor deposition apparatus precursor gas having formula (CH3)xSi(OCH3)4-x; simultaneously introducing a background gas, oxygen and nitrogen; operating apparatus to cause a carbon doped oxide layer to form
12/19/2002	US20020192981 Coating liquid for forming a silica group coating film having a small dielectric constant
12/19/2002	US20020192980 Methods for forming low-k dielectric films
12/19/2002	US20020192979 Dielectric layer forming method and devices formed therewith
12/19/2002	US20020192978 Method and apparatus for stabilizing high pressure oxidation of a semiconductor device
12/19/2002	US20020192977 Mothods for processing a coating film and for manufacturing a semiconductor element
12/19/2002	US20020192976 Self-aligned PECVD etch mask
12/19/2002	US20020192975 Dielectric layer forming method and devices formed therewith
12/19/2002	US20020192974 Dielectric layer forming method and devices formed therewith
12/19/2002	US20020192973 Anisotropic etch method
12/19/2002	US20020192972 Plasma processing
12/19/2002	US20020192971 Plasma processing apparatus and processing method using the same, and manufacturing method of semiconductor device
12/19/2002	US20020192970 Method for manufacturing charge-coupled image sensors
12/19/2002	US20020192969 Method for etching silicon trenches
12/19/2002	US20020192968 Method for precisely machining microstructure
12/19/2002	US20020192967 Process for manufacturing semiconductor integrated circuit device
12/19/2002	US20020192966 In situ sensor based control of semiconductor processing procedure
12/19/2002	US20020192965 Apparatus and methods with resolution enhancement feature for improving accuracy of conversion of required chemical mechanical polishing pressure to force to be applied by polishing head to wafer
12/19/2002	US20020192964 .01-.1% sulfur is present in the dissolved state to improve creep strength
12/19/2002	US20020192963 Semiconductor processing methods, and methods of forming a dynamic random access memory (DRAM) storage capacitor
12/19/2002	US20020192962 Method of chemical/mechanical polishing of the surface of semiconductor device
12/19/2002	US20020192961 Method for forming isolation regions on semiconductor device
12/19/2002	US20020192960 Method and material for removing etch residue from high aspect ratio contact surfaces
12/19/2002	US20020192959 III nitride semiconductor substrate for ELO
12/19/2002	US20020192958 Plasma-etching process for molybdenum silicon nitride layers on half-tone phase masks based on gas mixtures containing monofluoromethane and oxygen
12/19/2002	US20020192957 Applications of oxide hardmasking in metal dry etch processors
12/19/2002	US20020192956 Formation of silicon on insulator (SOI) devices as add-on modules for system on a chip processing
12/19/2002	US20020192955 Radical-assisted sequential CVD
12/19/2002	US20020192954 Radical-assisted sequential CVD
12/19/2002	US20020192953 Method for forming a plug metal layer
12/19/2002	US20020192952 Plasma treatment of tantalum nitride compound films formed by chemical vapor deposition
12/19/2002	US20020192951 Method of manufacturing a semiconductor device
12/19/2002	US20020192950 Si-rich surface layer capped diffusion barriers
12/19/2002	US20020192949 Embedded metal nanocrystals
12/19/2002	US20020192948 Integrated barrier layer structure for copper contact level metallization
12/19/2002	US20020192947 Focused ion beam deposition
12/19/2002	US20020192946 Semiconductor device and method of manufacturing the same
12/19/2002	US20020192945 Method of forming wiring structure by using photo resist having optimum development rate
12/19/2002	US20020192944 Method and apparatus for controlling a thickness of a copper film
12/19/2002	US20020192943 Borderless contact with buffer layer
12/19/2002	US20020192942 Composition compatible with aluminum planarization and methods therefore
12/19/2002	US20020192941 Method for reducing dishing in copper chemical mechanical polishing process
12/19/2002	US20020192940 Method for forming selective protection layers on copper interconnects
12/19/2002	US20020192939 Method of manufacturing a contract element and a multi-layered wiring substrate, and wafer batch contact board
12/19/2002	US20020192938 Semiconductor device and method for manufacturing the same
12/19/2002	US20020192937 Method for manufacturing semiconductor devices having copper interconnect and low-K dielectric layer
12/19/2002	US20020192936 Recessed tape and method for forming a BGA assembly
12/19/2002	US20020192935 Semiconductor die including conductive columns
12/19/2002	US20020192934 2-input nor gate with NMOS transistors and PMOS transistors formed on different semiconductor layers
12/19/2002	US20020192933 Semiconductor devices fabricated using sputtered silicon targets
12/19/2002	US20020192932 Salicide integration process
12/19/2002	US20020192931 Method of manufacturing semiconductor device
12/19/2002	US20020192930 Method of forming a single crystalline silicon pattern utilizing a structural selective epitaxial growth technique and a selective silicon etching technique
12/19/2002	US20020192928 Semiconductor chip and its manufacturing method
12/19/2002	US20020192927 Semiconductor device production method and apparatus
12/19/2002	US20020192926 High contrast lithography alignment marks for semiconductor manufacturing
12/19/2002	US20020192925 Method of forming trench isolation regions
12/19/2002	US20020192924 Methods of forming integrated circuit capacitors having U-shaped electrodes and capacitors formed thereby
12/19/2002	US20020192923 Method of preventing toppling of lower electrode through flush cleaning
12/19/2002	US20020192922 Method for fabricating polysilicon capacitor
12/19/2002	US20020192921 Method for forming a metal capacitor in a damascene process
12/19/2002	US20020192920 Passive devices and modules for transceiver and manufacturing method thereof
12/19/2002	US20020192919 Structure and method to increase density of MIM capacitors in damascene process
12/19/2002	US20020192918 Heterojunction bipolar transistor and method for fabricating the same
12/19/2002	US20020192917 Method of converting a metal oxide semiconductor transistor into a bipolar transistor

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