Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
12/2002
12/31/2002US6501149 Semiconductor device having trench isolation structure and method of forming same
12/31/2002US6501148 Trench isolation for semiconductor device with lateral projections above substrate
12/31/2002US6501147 Process for manufacturing electronic devices comprising high voltage MOS transistors, and electronic device thus obtained
12/31/2002US6501146 Semiconductor device and method of manufacturing thereof
12/31/2002US6501145 Semiconductor component and method for producing the same
12/31/2002US6501144 Conductive line with multiple turns for programming a MRAM device
12/31/2002US6501143 Spin-valve transistor
12/31/2002US6501142 Topographical electrostatic protection grid for sensors
12/31/2002US6501141 Self-aligned contact with improved isolation and method for forming
12/31/2002US6501140 Transistor structures
12/31/2002US6501139 Channel region underlies at least a portion of the gate electrode and is separated from the isolation region by a portion of the well region; can be easily integrated into a complimentary-metal-oxide-semiconductor (cmos)
12/31/2002US6501138 Semiconductor memory device and method for manufacturing the same
12/31/2002US6501135 Germanium-on-insulator (GOI) device
12/31/2002US6501134 Ultra thin SOI devices with improved short-channel control
12/31/2002US6501133 SOI semiconductor device and method of manufacturing the same
12/31/2002US6501132 Transistor with variable channel width
12/31/2002US6501131 Transistors having independently adjustable parameters
12/31/2002US6501130 High-voltage transistor with buried conduction layer
12/31/2002US6501129 Semiconductor device
12/31/2002US6501128 Insulated gate transistor and the method of manufacturing the same
12/31/2002US6501127 Semiconductor device including a nonvolatile memory-cell array, and method of manufacturing the same
12/31/2002US6501125 Semiconductor device and manufacturing method thereof
12/31/2002US6501124 Non-volatile semiconductor memory device
12/31/2002US6501123 High gate coupling non-volatile memory structure
12/31/2002US6501122 Flash device having a large planar area ono interpoly dielectric
12/31/2002US6501121 Semiconductor structure
12/31/2002US6501120 Capacitor under bitline (CUB) memory cell structure employing air gap void isolation
12/31/2002US6501119 Semiconductor memory device and method of producing same
12/31/2002US6501118 Semiconductor device having conducting material film formed in trench, manufacturing method thereof and method of forming resist pattern used therein
12/31/2002US6501117 Static self-refreshing DRAM structure and operating mode
12/31/2002US6501116 Semiconductor memory device with MIS transistors
12/31/2002US6501115 Semiconductor integrated circuit device and process for manufacturing the same
12/31/2002US6501114 Structures comprising transistor gates
12/31/2002US6501113 Semiconductor device with capacitor using high dielectric constant film or ferroelectric film
12/31/2002US6501112 Semiconductor device and method of manufacturing the same
12/31/2002US6501108 Semiconductor integrated circuit
12/31/2002US6501106 Semiconductor integrated circuit device and method of producing the same
12/31/2002US6501105 Compound semiconductor device
12/31/2002US6501104 High speed semiconductor photodetector
12/31/2002US6501098 Semiconductor device
12/31/2002US6501097 Electro-optical device
12/31/2002US6501096 Display and fabricating method thereof
12/31/2002US6501095 Thin film transistor
12/31/2002US6501094 Semiconductor device comprising a bottom gate type thin film transistor
12/31/2002US6501090 Semiconductor laser and method of manufacturing the same
12/31/2002US6501083 Methods for calculating cumulative dose of exposure energy from regions of a microlithography reticle for use in correcting proximity effects
12/31/2002US6501082 Plasma deposition apparatus and method with controller
12/31/2002US6501080 Ion implanting apparatus and sample processing apparatus
12/31/2002US6501078 Ion extraction assembly
12/31/2002US6501070 Pod load interface equipment adapted for implementation in a fims system
12/31/2002US6501065 Image sensor using a thin film photodiode above active CMOS circuitry
12/31/2002US6501051 Continuous-conduction wafer bump reflow system
12/31/2002US6501043 Apparatus and method for laser welding of ribbons
12/31/2002US6500971 Ester compounds having alicyclic and oxirane structures and method for preparing the same
12/31/2002US6500774 Method and apparatus for an increased throughput furnace nitride BARC process
12/31/2002US6500773 Positioning substrate in deposition chamber, providing gas mixture comprising phenyl-based alkoxysilane compound and specified organosilane compound, reacting gas mixture to form organosilicate thin film on substrate
12/31/2002US6500772 Methods and materials for depositing films on semiconductor substrates
12/31/2002US6500771 Method of high-density plasma boron-containing silicate glass film deposition
12/31/2002US6500770 Method for forming a multi-layer protective coating over porous low-k material
12/31/2002US6500769 Semiconductor device and method for fabricating the same
12/31/2002US6500768 Method for selective removal of ONO layer
12/31/2002US6500767 Method of etching semiconductor metallic layer
12/31/2002US6500766 Post-cleaning method of a via etching process
12/31/2002US6500765 Method for manufacturing dual-spacer structure
12/31/2002US6500764 Method for thinning a semiconductor substrate
12/31/2002US6500763 Method for manufacturing an electrode of a capacitor
12/31/2002US6500762 Method of depositing a copper seed layer which promotes improved feature surface coverage
12/31/2002US6500761 Method for improving the adhesion and durability of CVD tantalum and tantalum nitride modulated films by plasma treatment
12/31/2002US6500760 Gold-based electrical interconnections for microelectronic devices
12/31/2002US6500759 Protective layer having compression stress on titanium layer in method of making a semiconductor device
12/31/2002US6500758 Method for selective metal film layer removal using carbon dioxide jet spray
12/31/2002US6500757 Method and apparatus for controlling grain growth roughening in conductive stacks
12/31/2002US6500756 Method of forming sub-lithographic spaces between polysilicon lines
12/31/2002US6500755 Resist trim process to define small openings in dielectric layers
12/31/2002US6500754 Anneal hillock suppression method in integrated circuit interconnects
12/31/2002US6500753 Method to reduce the damages of copper lines
12/31/2002US6500752 Semiconductor device and semiconductor device manufacturing method
12/31/2002US6500751 Method of forming recessed thin film landing pad structure
12/31/2002US6500750 Semiconductor device and method of formation
12/31/2002US6500749 Method to improve copper via electromigration (EM) resistance
12/31/2002US6500748 Semiconductor device and method of manufacturing the same
12/31/2002US6500747 Method of manufacturing GaN semiconductor substrate
12/31/2002US6500746 Stereolithographically fabricated conductive elements, semiconductor device components and assemblies including such conductive elements, and methods
12/31/2002US6500745 Method for manufacturing sidewall spacers of a semiconductor device with high etch selectivity and minimized shaving
12/31/2002US6500744 Methods of forming DRAM assemblies, transistor devices, and openings in substrates
12/31/2002US6500743 Method of copper-polysilicon T-gate formation
12/31/2002US6500742 Construction of a film on a semiconductor wafer
12/31/2002US6500741 Method for making high voltage device
12/31/2002US6500740 Process for fabricating semiconductor devices in which the distribution of dopants is controlled
12/31/2002US6500739 Formation of an indium retrograde profile via antimony ion implantation to improve NMOS short channel effect
12/31/2002US6500738 Semiconductor processing methods of forming integrated circuitry and semiconductor processing methods of forming dynamic random access memory (DRAM) circuitry
12/31/2002US6500737 System and method for providing defect free rapid thermal processing
12/31/2002US6500736 Crystallization method of amorphous silicon
12/31/2002US6500735 Forming a semiconductor layer having an acute projection of polycrystalline silicon on a substrate, and forming an insulating layer layer by oxidation so the radius of curvature of the projection is a given value
12/31/2002US6500734 Gas inlets for wafer processing chamber
12/31/2002US6500732 Cleaving process to fabricate multilayered substrates using low implantation doses
12/31/2002US6500731 Process for producing semiconductor device module
12/31/2002US6500730 Method for filling structural gaps and integrated circuitry
12/31/2002US6500729 Method for reducing dishing related issues during the formation of shallow trench isolation structures
12/31/2002US6500728 Shallow trench isolation (STI) module to improve contact etch process window
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