Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
01/2003
01/14/2003US6506831 Novolac polymer planarization films with high temperature stability
01/14/2003US6506822 For encapsulation of semiconductor devices by potting, chip-on-bonding or screen printing
01/14/2003US6506693 Multiple loadlock system
01/14/2003US6506692 Method of making a semiconductor device using a silicon carbide hard mask
01/14/2003US6506691 High rate silicon nitride deposition method at low pressures
01/14/2003US6506690 Method for forming dielectric stack including second dielectric layer with lower undoped portion and upper doped portion
01/14/2003US6506689 Method for removing contaminants from a semiconductor wafer
01/14/2003US6506688 Method for removing photoresist layer on wafer edge
01/14/2003US6506687 Dry etching device and method of producing semiconductor devices
01/14/2003US6506686 Plasma processing apparatus and plasma processing method
01/14/2003US6506685 Perforated plasma confinement ring in plasma reactors
01/14/2003US6506684 Anti-corrosion system
01/14/2003US6506683 Photoresist layer is photolithographically patterned to form holes which overlie interconnect areas; etched using Reactive Ion Etching to insulating layer; etched to stop layer; photoresist removed and antireflective layer etched
01/14/2003US6506682 Non-selective slurries for chemical mechanical polishing of metal layers and method for manufacturing thereof
01/14/2003US6506681 Thin flip—chip method
01/14/2003US6506680 Method of forming connections with low dielectric insulating layers
01/14/2003US6506679 Deadhesion method and mechanism for wafer processing
01/14/2003US6506678 Integrated circuit structures having low k porous aluminum oxide dielectric material separating aluminum lines, and method of making same
01/14/2003US6506677 Method of forming capped copper interconnects with reduced hillock formation and improved electromigration resistance
01/14/2003US6506676 Method of manufacturing semiconductor devices with titanium aluminum nitride work function
01/14/2003US6506675 Copper film selective formation method
01/14/2003US6506674 Method of manufacturing a semiconductor integrated circuit device
01/14/2003US6506673 Defining dummy gate structure of spin on glass material on semiconductor substrate; forming dielectric layer; removing dummy structure to form gate opening within dielectric layer; and forming metal gate material within opening
01/14/2003US6506672 Re-metallized aluminum bond pad, and method for making the same
01/14/2003US6506671 Ring positionable about a periphery of a contact pad, semiconductor device components including same, and methods for positioning the ring around a contact pad
01/14/2003US6506670 Self aligned gate
01/14/2003US6506669 Method of fabricating a thin film transistor
01/14/2003US6506668 Utilization of annealing enhanced or repaired seed layer to improve copper interconnect reliability
01/14/2003US6506667 Growth of epitaxial semiconductor material with improved crystallographic properties
01/14/2003US6506666 Method of fabricating an SrRuO3 film
01/14/2003US6506665 Method and apparatus for heat-treating an SOI substrate and method of preparing an SOI substrate by using the same
01/14/2003US6506664 Method of transferring ultra-thin substrates and application of the method to the manufacture of a multi-layer thin film device
01/14/2003US6506663 Method for producing an SOI wafer
01/14/2003US6506662 Method for forming an SOI substrate by use of a plasma ion irradiation
01/14/2003US6506661 Isolation method to replace STI for deep sub-micron VLSI process including epitaxial silicon
01/14/2003US6506660 Semiconductor with nanoscale features
01/14/2003US6506659 High performance bipolar transistor
01/14/2003US6506658 Method for manufacturing a SOI wafer
01/14/2003US6506657 Process for forming damascene-type isolation structure for BJT device formed in trench
01/14/2003US6506656 Stepped collector implant and method for fabrication
01/14/2003US6506655 Bipolar transistor manufacturing method
01/14/2003US6506654 Source-side stacking fault body-tie for partially-depleted SOI MOSFET hysteresis control
01/14/2003US6506653 Method using disposable and permanent films for diffusion and implant doping
01/14/2003US6506652 Method of recessing spacers to improved salicide resistance on polysilicon gates
01/14/2003US6506651 Semiconductor device and manufacturing method thereof
01/14/2003US6506650 Method of fabrication based on solid-phase epitaxy for a MOSFET transistor with a controlled dopant profile
01/14/2003US6506649 Method for forming notch gate having self-aligned raised source/drain structure
01/14/2003US6506648 Method of fabricating a high power RF field effect transistor with reduced hot electron injection and resulting structure
01/14/2003US6506647 Method for fabricating a semiconductor integrated circuit device
01/14/2003US6506646 Method for manufacturing a semiconductor memory
01/14/2003US6506645 Depletion compensated polysilicon electrodes
01/14/2003US6506644 Method of fabricating semiconductor having a reduced leakage current flow between the accumulation electrode and the gate electrode
01/14/2003US6506643 Method for forming a damascene FeRAM cell structure
01/14/2003US6506642 Removable spacer technique
01/14/2003US6506641 Use of selective oxidation to improve LDMOS power transistors
01/14/2003US6506640 Multiple channel implantation to form retrograde channel profile and to engineer threshold voltage and sub-surface punch-through
01/14/2003US6506639 Method of forming low resistance reduced channel length transistors
01/14/2003US6506638 Vertical double gate transistor structure
01/14/2003US6506637 Method to form thermally stable nickel germanosilicide on SiGe
01/14/2003US6506636 Method of manufacturing a semiconductor device having a crystallized amorphous silicon film
01/14/2003US6506635 Semiconductor device, and method of forming the same
01/14/2003US6506634 Semiconductor memory device and method for producing same
01/14/2003US6506633 Method of fabricating a multi-chip module package
01/14/2003US6506632 Method of forming IC package having downward-facing chip cavity
01/14/2003US6506631 Method for manufacturing integrated circuits and semiconductor wafer which has integrated circuits
01/14/2003US6506630 Method of manufacturing a semiconductor device and a support plate with a flange for a semiconductor device
01/14/2003US6506628 Method of attaching a leadframe to singulated semiconductor dice
01/14/2003US6506627 Semiconductor device, tab tape for semiconductor device, method of manufacturing the tab tape and method of manufacturing the semiconductor device
01/14/2003US6506626 Semiconductor package structure with heat-dissipation stiffener and method of fabricating the same
01/14/2003US6506623 Microstructure array, mold for forming a microstructure array, and method of fabricating the same
01/14/2003US6506622 Method of manufacturing a photovoltaic device
01/14/2003US6506620 Process for manufacturing micromechanical and microoptomechanical structures with backside metalization
01/14/2003US6506618 Method of forming a GaInNAs layer
01/14/2003US6506617 In-plane switching liquid crystal display array
01/14/2003US6506615 Method for measuring the depth of well
01/14/2003US6506614 Method of locating and placing eye point features of a semiconductor die on a substrate
01/14/2003US6506613 Method for manufacturing semiconductor device having a capacitor
01/14/2003US6506544 Exposure method and exposure apparatus and mask
01/14/2003US6506543 Using super-resolution near-field structure to form a pattern with a smaller line width on a photoresist layer
01/14/2003US6506537 Radiation-sensitive resin composition
01/14/2003US6506534 Negative resist composition, method for the formation of resist patterns and process for the production of electronic devices
01/14/2003US6506497 Spin-on-glass anti-reflective coatings for photolithography
01/14/2003US6506490 Pressure-sensitive adhesive sheets for dicing
01/14/2003US6506453 Liquid film formed on substrate having temperature distribution for correcting temperature distribution of liquid film caused by heat of evaporation due to volatilization of solvent in liquid film, solvent removed to form coating film
01/14/2003US6506451 Composite structure and process for producing it
01/14/2003US6506448 Method of protective coating BGA solder alloy spheres
01/14/2003US6506441 Novolac polymer planarization films with high temperature stability
01/14/2003US6506438 By ink-jet printing using a transfer member; used in addressing an electronic display
01/14/2003US6506341 Chemiluminescence detection apparatus
01/14/2003US6506291 Substrate support with multilevel heat transfer mechanism
01/14/2003US6506290 Sputtering apparatus with magnetron device
01/14/2003US6506287 Overlap design of one-turn coil
01/14/2003US6506260 Method for cleaning photovoltaic module and cleaning apparatus
01/14/2003US6506257 Single-substrate-processing apparatus for semiconductor process
01/14/2003US6506256 Method and apparatus for diffusion of an impurity into a semiconductor wafer with high in-plane diffusion uniformity
01/14/2003US6506255 Apparatus for supplying gas used in semiconductor processing
01/14/2003US6506253 Photo-excited gas processing apparatus for semiconductor process
01/14/2003US6506252 Susceptorless reactor for growing epitaxial layers on wafers by chemical vapor deposition
01/14/2003US6506222 Method and apparatus for mounting component
01/14/2003US6506104 Carrier head with a flexible membrane