Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
01/2003
01/23/2003US20030018949 Method and apparatus for laying out wires on a semiconductor integrated circuit
01/23/2003US20030018943 Method of and device for detecting pattern, method of and device for checking pattern, method of and device for correcting and processing pattern, and computer product
01/23/2003US20030018410 Articles holders with sensors detecting a type of article held by the holder
01/23/2003US20030018406 Method and system for manufacturing semiconductor devices
01/23/2003US20030017962 Mixture of alkanolamine, tetraalktlammonium hydroxide, fluoride compound and corrosion inhbitor
01/23/2003US20030017786 CMP slurry and method for manufacturing a semiconductor device
01/23/2003US20030017785 Metal polish composition and polishing method
01/23/2003US20030017722 Structure and method for fabricating an integrated phased array circuit
01/23/2003US20030017721 System and method for selectively increasing surface temperature of an object
01/23/2003US20030017720 Method for fabricating semiconductor structures utilizing atomic layer epitaxy of organometallic compounds to deposit a metallic surfactant layer
01/23/2003US20030017718 Method for forming interlayer dielectric film
01/23/2003US20030017717 Methods for forming dielectric materials and methods for forming semiconductor devices
01/23/2003US20030017716 In-situ post epitaxial treatment process
01/23/2003US20030017715 Composite gate dielectric layer
01/23/2003US20030017714 Substrate processing apparatus and method for manufacturing semiconductor device
01/23/2003US20030017713 Workpiece stage of a resist curing device
01/23/2003US20030017712 Method for producing layered structures on a substrate, substrate and semiconductor components produced according to said method
01/23/2003US20030017711 Lithographic patterning of semiconductor circuits via optics, electron beam radiation, extreme ultraviolet radiation, or x-rays; etching
01/23/2003US20030017710 Method to improve latchup by forming selective sloped staircase STI structure to use in the I/0 or latchup sensitive area
01/23/2003US20030017709 System for, and method of, etching a surface on a wafer
01/23/2003US20030017708 Plasma etching gas
01/23/2003US20030017707 Semiconductor device and method for manufacturing thereof
01/23/2003US20030017706 Method and apparatus for cleaning a web-based chemical mechanical planarization system
01/23/2003US20030017705 Method of producing semiconductor devices using chemical mechanical polishing
01/23/2003US20030017704 Process for planarization of integrated circuit structure which inhibits cracking of low dielectric constant dielectric material adjacent underlying raised structures
01/23/2003US20030017703 Processes for chemical-mechanical polishing of a semiconductor body
01/23/2003US20030017701 Method and apparatus for manufacturing semiconductor device
01/23/2003US20030017700 Process for hillock control in thin film metallization
01/23/2003US20030017699 Semiconductor device having passive elements and method of making same
01/23/2003US20030017698 Semiconductor device manufacturing method of forming an etching stopper film on a diffusion prevention film at a higher temperature
01/23/2003US20030017697 Methods of forming metal layers using metallic precursors
01/23/2003US20030017696 Method for improving capability of metal filling in deep trench
01/23/2003US20030017695 Reliability barrier integration for Cu application
01/23/2003US20030017694 Selective etching of organosilicate films over silicon oxide stop etch layers
01/23/2003US20030017693 Method of manufacturing semiconductor device for protecting Cu layer from post chemical mechanical polishing-corrosion and chemical mechanical polishing equipment used in the same
01/23/2003US20030017692 Semiconductor integrated circuit device and manufacturing method of semiconductor integrated circuit device
01/23/2003US20030017690 Apparatus and method for attaching integrated circuit structures and devices utilizing the formation of a compliant substrate to a circuit board
01/23/2003US20030017689 Methods of forming a transistor gate
01/23/2003US20030017688 Method for reducing hole defects in the polysilicon layer
01/23/2003US20030017687 Method for filling a wafer through-VIA with a conductive material
01/23/2003US20030017686 Method for fabricating semiconductor device
01/23/2003US20030017685 Method of forming an epitaxially grown nitride-based compound semiconductor crystal substrate structure and the same substrate structure
01/23/2003US20030017684 Method of producing doped polysilicon layers and polysilicon layered structures
01/23/2003US20030017683 Structure and method for fabricating heterojunction bipolar transistors and high electron mobility transistors utilizing the formation of a complaint substrates for materials used to form the same
01/23/2003US20030017682 Method of manufacturing a semiconductor device
01/23/2003US20030017680 Method of forming DRAM circuitry
01/23/2003US20030017679 Substrate bonding using a selenidation reaction
01/23/2003US20030017678 Method of reducing stress and encroachment effect of isolation device on active regions
01/23/2003US20030017677 Storage electrode of a semiconductor memory device and method for fabricating the same
01/23/2003US20030017676 Operating method for a semiconductor component
01/23/2003US20030017675 Method of manufacturing deep trench capacitor
01/23/2003US20030017674 Source/drain extension fabrication process
01/23/2003US20030017673 Tunable threshold voltage of a thick field oxide ESD protection device with a N-field implant
01/23/2003US20030017672 Nonvolatile memory device
01/23/2003US20030017671 Non-volatile memory device and method for fabricating the same
01/23/2003US20030017670 Method of manufacturing a semiconductor memory device with a gate dielectric stack
01/23/2003US20030017669 Method of manufacturing a semiconductor device and semiconductor device
01/23/2003US20030017668 Method for fabricating self-aligning mask layers
01/23/2003US20030017667 Semiconductor memory device having capacitor and method of forming the same
01/23/2003US20030017666 Integrated structure comprising a patterned feature substantially of single grain polysilicon
01/23/2003US20030017665 Substrate treating method and apparatus
01/23/2003US20030017664 Kill index analysis for automatic defect classification in semiconductor wafers
01/23/2003US20030017663 Semiconductor device manufacturing method for reinforcing chip by use of seal member at pickup time
01/23/2003US20030017661 Laser-assisted fabrication of semiconductor structures and devices formed by utilizing a compliant substrate
01/23/2003US20030017660 GaAs MESFET having LDD and non-uniform P-well doping profiles
01/23/2003US20030017659 Polysilicon film forming method
01/23/2003US20030017658 Non-single crystal film, substrate with non-single crystal film, method and apparatus for producing the same, method and apparatus for inspecting the same, thin film trasistor, thin film transistor array and image display using it
01/23/2003US20030017657 Method of forming a gate electrode in a semiconductor device and method of manufacturing a non-volatile memory device using the same
01/23/2003US20030017656 Method for fabricating thin-film transistor
01/23/2003US20030017655 Process for manufacturing reflective TFT-LCD with rough diffuser
01/23/2003US20030017654 Semiconductor chip having a supporting member, tape substrate, semiconductor package having the semiconductor chip and the tape substrate, and the method of manufacturing the same
01/23/2003US20030017653 Semiconductor package insulation film and manufacturing method thereof
01/23/2003US20030017652 Semiconductor device, its fabrication method and electronic device
01/23/2003US20030017651 Leadframe alteration to direct compound flow into package
01/23/2003US20030017649 Sample preparation apparatus and method
01/23/2003US20030017647 Wafer level stack chip package and method for manufacturing same
01/23/2003US20030017645 Method for manufacturing circuit device
01/23/2003US20030017644 Compound semiconductor device and manufacturing method thereof
01/23/2003US20030017642 Carbon-graded layer for improved adhesion of low-k dielectrics to silicon substrates
01/23/2003US20030017641 Method for manufacturing solar battery
01/23/2003US20030017640 Optical interconnect and method for fabricating an optical interconnect in a photosensitive material
01/23/2003US20030017639 High-dielectric constant insulators for FEOL capacitors
01/23/2003US20030017638 Method for manufacturing tapered openings using an anisotropic etch during the formation of a semiconductor device
01/23/2003US20030017636 Method of fabricating thin film transistor flat panel display
01/23/2003US20030017635 Low dielectric constant polyorganosilicon materials generated from polycarbosilanes
01/23/2003US20030017634 Electro-optical device
01/23/2003US20030017633 Semiconductor light emitting device and method of fabricating semiconductor light emitting device
01/23/2003US20030017631 Method of arranging exposed areas including a limited number of TEG regions on a semiconductor wafer
01/23/2003US20030017630 In-Line system having overlay accuracy measurement function and method for the same
01/23/2003US20030017628 Monitoring process for oxide removal
01/23/2003US20030017627 Stacked ferroelectric memory device and method of making same
01/23/2003US20030017626 Method and apparatus for controlling propagation of dislocations in semiconductor structures and devices
01/23/2003US20030017625 Structure and method for fabricating an optical device in a semiconductor structure
01/23/2003US20030017624 Structure and method for fabricating semiconductor structures and devices utilizing compliant substrate for materials used to form the same
01/23/2003US20030017623 Reliable adhesion layer interface structure for polymer memory electrode and method of making same
01/23/2003US20030017622 Structure and method for fabricating semiconductor structures with coplanar surfaces
01/23/2003US20030017621 Fabrication of buried devices within a semiconductor structure
01/23/2003US20030017422 Method for producing liquid crystal display apparatus
01/23/2003US20030017420 Lower sulfite/sulfate concentration on the wafer due to plasma treatment translates into less moisture pick up and prevents high aspect ratio collapse; microelectronics
01/23/2003US20030017419 Mass production method of semiconductor integrated circuit device and manufacturing method of electronic device