Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
01/2003
01/29/2003CN1393747A Method for controlling treater
01/29/2003CN1393739A Process for decreasing photoresist roughness by cross-linking reaction of deposit on photoresist
01/29/2003CN1393696A Pressing contacting structure for detector
01/29/2003CN1393575A Molecular beam source apparatus for film deposition and method for depositing film by molecular beam
01/29/2003CN1393387A System for driving loading station
01/29/2003CN1393385A Moving loading device for plate shape substrates and its storing device
01/29/2003CN1393322A Pull-up tool for dual in-line IC
01/29/2003CN1100474C Electronic package and its mfg. method
01/29/2003CN1100473C Structure reinforced spherical grid array semiconductor package and system
01/29/2003CN1100388C Input/output voltage detection type substrate voltage generation circuit
01/29/2003CN1100351C Flash EEPROM cell and mfg. methods thereof
01/29/2003CN1100350C Conductor for forming conductive path on integrated circuit and method thereof
01/29/2003CN1100349C Semiconductor and method of fabricating same
01/29/2003CN1100348C Semiconductor device and method of fabricating same
01/29/2003CN1100347C Method for producing semiconductor device
01/29/2003CN1100344C Method for mfg. semiconductor device
01/29/2003CN1100343C Method for forming contact plugs in semiconductor device
01/29/2003CN1100342C Process for mfg. semiconductor devices
01/29/2003CN1100324C Semiconductor storage device with improved stage power source line structure
01/28/2003US6513150 Method of generating mesh for process simulation
01/28/2003US6513147 Semiconductor integrated circuit device and layout method using primitive cells having indentical core designs
01/28/2003US6513146 Method of designing semiconductor integrated circuit device, method of analyzing power consumption of circuit and apparatus for analyzing power consumption
01/28/2003US6513000 Simulating wiring temperature rise due to void by conducting two-dimensional thermal analysis on wiring cross-section using computer
01/28/2003US6512998 Sputter profile simulation method
01/28/2003US6512885 Liquid raw material vaporizer, semiconductor device and method of manufacturing semiconductor device
01/28/2003US6512843 Pattern comparison method and appearance inspection machine for performance comparison based on double detection without delay
01/28/2003US6512811 Evaluation method and evaluation apparatus for semiconductor device
01/28/2003US6512780 System for compensating directional and positional fluctuations in light produced by a laser
01/28/2003US6512719 Semiconductor memory device capable of outputting and inputting data at high speed
01/28/2003US6512708 Placement and routing for wafer scale memory
01/28/2003US6512703 Nonvolatile semiconductor memory
01/28/2003US6512699 Nonvolatile semiconductor memory device having a hierarchial bit line structure
01/28/2003US6512695 Field programmable logic arrays with transistors with vertical gates
01/28/2003US6512692 Nonvolatile semiconductor storage device and test method therefor
01/28/2003US6512691 Non-volatile memory embedded in a conventional logic process
01/28/2003US6512689 MRAM without isolation devices
01/28/2003US6512688 Device for evaluating cell resistances in a magnetoresistive memory
01/28/2003US6512663 Electrostatic protection device and electrostatic protection circuit
01/28/2003US6512634 Beam homogenizer, laser illumination apparatus and method, and semiconductor device
01/28/2003US6512631 Broad-band deep ultraviolet/vacuum ultraviolet catadioptric imaging system
01/28/2003US6512573 Projection exposure apparatus and exposure method
01/28/2003US6512571 Anti-vibration system for exposure apparatus
01/28/2003US6512535 Laser drawing apparatus and laser drawing method
01/28/2003US6512504 Electronic device and electronic apparatus
01/28/2003US6512405 Oscillator bias variation mechanism
01/28/2003US6512394 Technique for efficient logic power gating with data retention in integrated circuit devices
01/28/2003US6512391 Probe station thermal chuck with shielding for capacitive current
01/28/2003US6512386 Device testing contactor, method of producing the same, and device testing carrier
01/28/2003US6512384 Method for fast and accurate determination of the minority carrier diffusion length from simultaneously measured surface photovoltages
01/28/2003US6512303 Flip chip adaptor package for bare die
01/28/2003US6512302 Apparatus and methods of packaging and testing die
01/28/2003US6512299 Semiconductor device and a manufacturing process therefor
01/28/2003US6512298 Semiconductor device and method for producing the same
01/28/2003US6512297 Liquid chemical vapor deposition source material including at least one organometallic compound of platinum group metal dissolved in tetrahydrofuran and having moisture content of not more than 200 ppm
01/28/2003US6512296 Semiconductor structure having heterogenous silicide regions having titanium and molybdenum
01/28/2003US6512295 Coupled-cap flip chip BGA package with improved cap design for reduced interfacial stresses
01/28/2003US6512294 Adsorbing device, sucker and mounting device for conductive member, adsorbing method and mounting method for conductive member, and semiconductor device and method of making the same
01/28/2003US6512288 Circuit board semiconductor package
01/28/2003US6512287 Board frame, method for fabricating thereof and method for fabricating semiconductor apparatus
01/28/2003US6512283 Monolithic low dielectric constant platform for passive components and method
01/28/2003US6512282 Semiconductor device and method for fabricating the same
01/28/2003US6512281 Method of forming a semiconductor device and an improved deposition system
01/28/2003US6512279 Photoelectric converter, its driving method, and system including the photoelectric converter
01/28/2003US6512278 Stacked semiconductor integrated circuit device having an inter-electrode barrier to silicide formation
01/28/2003US6512277 Semiconductor memory device and fabrication thereof
01/28/2003US6512276 Semiconductor memory having an improved cell layout
01/28/2003US6512275 Apparatus including active device formed in substantially continuous mesa region of semiconductor material formed on one or more sides of isolation region, and conductive path formed in mesa region which extends in linear direction
01/28/2003US6512274 CMOS-process compatible, tunable NDR (negative differential resistance) device and method of operating same
01/28/2003US6512273 Integrated circuit complementary metal oxide semiconductor structure formed using disposable spacer technology, wherein polysilicon permanent spacers are utilized for n-channel devices and silicon nitride spacers for p-channel devices
01/28/2003US6512272 Increased gate to body coupling and application to dram and dynamic circuits
01/28/2003US6512271 Semiconductor device
01/28/2003US6512270 Thin film transistor substrate and process for producing the same
01/28/2003US6512269 High-voltage high-speed SOI MOSFET
01/28/2003US6512267 Superjunction device with self compensated trench walls
01/28/2003US6512266 Method of fabricating SiO2 spacers and annealing caps
01/28/2003US6512265 Method of fabricating semiconductor device
01/28/2003US6512264 Flash memory having pre-interpoly dielectric treatment layer and method of forming
01/28/2003US6512263 Closely spaced rows of memory cells are electrically isolated from one another with trenches in substrate which are filled with dielectric; isolated source and drain memory cell diffusions are connected by bit lines formed above substrate
01/28/2003US6512262 Non-volatile semiconductor memory device and method of manufacturing the same
01/28/2003US6512261 Removing capacitor electrode film exposed to upper surface of interlayer insulating film before making surface of capacitor electrode film formed inside holes rugged surface; reduces percentage of defective memories
01/28/2003US6512260 Metal capacitor in damascene structures
01/28/2003US6512259 Capacitor with high-ε dielectric or ferroelectric material based on the fin stack principle
01/28/2003US6512258 Semiconductor device and method of manufacturing same
01/28/2003US6512256 Integrated circuit having self-aligned hydrogen barrier layer and method for fabricating same
01/28/2003US6512253 Nonvolatile semiconductor memory
01/28/2003US6512252 Semiconductor device
01/28/2003US6512247 Semiconductor device including a TFT having large-grain polycrystalline active layer, LCD employing the same and method of fabricating them
01/28/2003US6512246 Thin film transistor
01/28/2003US6512245 Semiconductor integrated circuit device
01/28/2003US6512244 SOI device with structure for enhancing carrier recombination and method of fabricating same
01/28/2003US6512243 Thin film transistor assembly, particularly suitable for liquid crystal display device, and process for fabricating the same
01/28/2003US6512237 Charged beam exposure method and charged beam exposure apparatus
01/28/2003US6512235 Nanotube-based electron emission device and systems using the same
01/28/2003US6512207 Apparatus including heating plate and localizing temperature measuring device that is directed upon surface of substrate that faces away from heating plate; uniformity and homogeneity of treatment
01/28/2003US6512206 Furnace having high mass heating section which exceeds mass of working components; minimizes thermal fluctuations of furnace during heat treating operations and increases reliability
01/28/2003US6512182 Wiring circuit board and method for producing same
01/28/2003US6512071 Organohydridosiloxane resins with high organic content
01/28/2003US6512031 First curing agent for polymerizing the epoxy resin into a linear polymer, and a second curing agent for crosslinking the linear polymer into a three-dimensional polymer. The use of two curing agents corresponding to straight chain growth
01/28/2003US6511925 Process for forming high dielectric constant gate dielectric for integrated circuit structure
01/28/2003US6511924 Method of forming a silicon oxide layer on a substrate