Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/2003
02/13/2003US20030032378 Polishing surface constituting member and polishing apparatus using the polishing surface constituting member
02/13/2003US20030032377 Measuring apparatus
02/13/2003US20030032373 Fabrication of semiconductor interconnect structures
02/13/2003US20030032371 Chemical mechanical polishing compositions and methods relating thereto
02/13/2003US20030032307 Layering nitrided oxide on a silicon substrate
02/13/2003US20030032306 Method for low temperature chemical vapor deposition of low-k films using selected cyclosiloxane and ozone gases for semiconductor applications
02/13/2003US20030032305 Method of depositing low dielectric constant carbon doped silicon oxide
02/13/2003US20030032304 Process for the electrochemical oxidation of a semiconductor substrate
02/13/2003US20030032303 Ozone-enhanced oxidation for high-k dielectric semiconductor devices
02/13/2003US20030032301 Showerhead electrode design for semiconductor processing reactor
02/13/2003US20030032300 Plasma ashing process
02/13/2003US20030032298 Method for etching an antireflective coating and for fabricating a semiconductor device
02/13/2003US20030032297 Method to GaAs based lasers and a GaAs based laser
02/13/2003US20030032296 Method of forming integrated circuitry, method of forming a contact opening, and integrated circuitry
02/13/2003US20030032295 Method of building a CMOS structure on thin SOI with source/drain electrodes formed by in situ doped selective amorphous silicon
02/13/2003US20030032294 Method for handling a thin silicon wafer
02/13/2003US20030032292 Fabrication method of semiconductor integrated circuit device
02/13/2003US20030032291 Poly gate silicide inspection by back end etching and by enhanced gas etching
02/13/2003US20030032290 Device isolation process flow for ARS system
02/13/2003US20030032288 Nitride semiconductor substrate and method for manufacturing the same, and nitride semiconductor device using nitride semiconductor substrate
02/13/2003US20030032287 Method and apparatus for fixed abrasive substrate preparation and use in a cluster CMP tool
02/13/2003US20030032284 Fabrication method of semiconductor integrated circuit device
02/13/2003US20030032282 Barrier layer deposition using HDP-CVD
02/13/2003US20030032281 Graded thin films
02/13/2003US20030032280 Method for filling fine hole
02/13/2003US20030032279 Method for forming a metallization layer
02/13/2003US20030032278 All dual damascene oxide etch process steps in one confined plasma chamber
02/13/2003US20030032277 Semiconductor device, method of manufacturing the same, circuit board and electronic instrument
02/13/2003US20030032276 Method of fabricating a wafer level package
02/13/2003US20030032275 Method of copper/copper surface bonding using a conducting polymer for application in IC chip bonding
02/13/2003US20030032274 Method for eliminating reaction between photoresist and OSG
02/13/2003US20030032273 Flash memory cell and method for fabricating a flash memory cell
02/13/2003US20030032272 Method for forming junction on insulator (joi) structure
02/13/2003US20030032271 Method for making a semiconductor device having copper conductive layers
02/13/2003US20030032270 Fabrication method for a device for regulating flow of electric current with high dielectric constant gate insulating layer and source/drain forming schottky contact or schottky-like region with substrate
02/13/2003US20030032269 Dual layer hard mask for edram gate etch process
02/13/2003US20030032267 Method for forming crystalline semiconductor film and apparatus for forming the same
02/13/2003US20030032266 Manufacturing method of gate insulating film
02/13/2003US20030032264 Method of manufacturing semiconductor device having conductive thin films
02/13/2003US20030032263 Semiconductor wafer, semiconductor device, and method for manufacturing the same
02/13/2003US20030032262 Silicon on insulator DRAM process utilizing both fully and partially depleted devices
02/13/2003US20030032261 Method of preventing threshold voltage of MOS transistor from being decreased by shallow trench isolation formation
02/13/2003US20030032260 Isolation technology for submicron semiconductor devices
02/13/2003US20030032259 Method for filling trenches in integrated semiconductor circuits
02/13/2003US20030032258 Isolation region forming methods
02/13/2003US20030032257 Strap resistance using selective oxidation to cap DT poly before STI etch
02/13/2003US20030032256 Overlay shift correction for the deposition of epitaxial silicon layer and post-epitaxial silicon layers in a semiconductor device
02/13/2003US20030032255 Method of forming noble metal pattern
02/13/2003US20030032253 InPSb/InAs BJT device and method of making
02/13/2003US20030032252 AlGaAs or InGaP low turn-on voltage GaAs-based heterojunction bipolar transistor
02/13/2003US20030032251 Use of disposable spacer to introduce gettering in SOI layer
02/13/2003US20030032250 Semiconductor memory device and method of forming the same
02/13/2003US20030032249 Semiconductor device and manufacturing method thereof
02/13/2003US20030032248 Method of fabricating trench MIS device with graduated gate oxide layer
02/13/2003US20030032247 Trench MIS device with active trench corners and thick bottom oxide and method of making the same
02/13/2003US20030032245 NAND-type flash memory device and method of forming the same
02/13/2003US20030032244 Method of manufacturing an integrated circuit, for integrating an electrically programmable, non-volatile memory and high-performance logic circuitry in the same semiconductor chip
02/13/2003US20030032243 Twin NAND device structure, array operations and fabrication method
02/13/2003US20030032242 Method of forming non-volatile memory having floating trap type device
02/13/2003US20030032241 Non-volatile memory device having self-aligned gate structure and method of manufacturing same
02/13/2003US20030032240 Semiconductor memory device having a multiple tunnel junction layer pattern and method of fabricating the same
02/13/2003US20030032239 Processes and structures for self-aligned contact non-volatile memory with peripheral transistors easily modifiable for various technologies and applications
02/13/2003US20030032238 Methods for manufacturing storage nodes of stacked capacitors
02/13/2003US20030032237 High dielectric constant materials forming components of DRAM such as deep-trench capacitors and gate dielectric (insulators) for support circuits
02/13/2003US20030032236 Semiconductor device manufacturing method and semiconductor device
02/13/2003US20030032235 Method of manufacturing high dielectric constant material
02/13/2003US20030032234 Semiconductor integrated circuit device and method of manufacturing the same
02/13/2003US20030032233 Method for manufacturing semiconductor integrated circuit device
02/13/2003US20030032232 Semiconductor transistor having a polysilicon emitter and methods of making the same
02/13/2003US20030032231 Methods and devices for optimized digital and analog CMOS transistor performance in deep submicron technology
02/13/2003US20030032230 Semiconductor device and method for fabricating the same
02/13/2003US20030032229 DRAM devices, and methods of forming DRAM devices
02/13/2003US20030032228 Lightly doped drain MOS transistor
02/13/2003US20030032227 MOSFET, semiconductor device using the same and production process therefor
02/13/2003US20030032226 Semiconductor integrated circuit device and method of manufacturing the same
02/13/2003US20030032225 Method to controllably form notched polysilicon gate structures
02/13/2003US20030032224 Method of forming the protective film to prevent NROM cell charging
02/13/2003US20030032223 Semiconductor device and manufacturing method thereof
02/13/2003US20030032222 Pulse laser irradation method for forming a semiconductor thin film
02/13/2003US20030032221 Semiconductor device and method of manufacturing the same
02/13/2003US20030032220 Method for fabricating an ESD device
02/13/2003US20030032219 Semiconductor device having self-aligned contact pads and method for manufacturing the same
02/13/2003US20030032218 Method of manufacturing a semiconductor device
02/13/2003US20030032217 Stereolithographic method and apparatus for fabricating spacers for semiconductor devices and resulting structures
02/13/2003US20030032216 Semiconductor device and manufacturing method thereof
02/13/2003US20030032210 Semiconductor device and peeling off method and method of manufacturing semiconductor device
02/13/2003US20030032206 Method of making a ferroelectric memory transistor
02/13/2003US20030031974 Heating furnace and semiconductor wafer-holding jig assembly and process of manufacturing semiconductor devices
02/13/2003US20030031957 Depositing an antireflective compound in a layer on said substrate surface by chemical vapor deposition; and applying a photoresist layer to said antireflective compound layer to yield the circuit precursor.
02/13/2003US20030031952 Polymers, resist compositions and patterning process
02/13/2003US20030031950 A compound capable of generating an acid upon irradiation; a resin capable of decomposing by the action of an acid to increase the solubility; and a specified dissolution-inhibiting compound.
02/13/2003US20030031949 Novel polymers and photoresist compositions comprising same
02/13/2003US20030031943 Focus monitoring method, focus monitoring system, and device fabricating method
02/13/2003US20030031939 Large-area membrane mask and method for fabricating the mask
02/13/2003US20030031938 Lithographic apparatus, device manufacturing methods, devices manufactured thereby, method of manufacturing a reflector, reflector manufactured thereby and phase shift mask
02/13/2003US20030031890 Angular substrates
02/13/2003US20030031867 Laminate of an insulating film layer having adhesive agent in the semi- cured state, coefficient of linear expansion in the film transverse direction at 50-200 degrees C. is 17-30 ppm/degrees c and tensile modulus of elasticity is 6-12 GPa
02/13/2003US20030031866 Pressure sensitive adhesive double coated sheet
02/13/2003US20030031862 Adhesive sheet for dicing
02/13/2003US20030031807 Deposition of transition metal carbides
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