Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
02/2003
02/25/2003US6525363 Integrated circuit configuration with at least one capacitor and method for producing the same
02/25/2003US6525361 Process and integrated circuit for a multilevel memory cell with an asymmetric drain
02/25/2003US6525360 Semiconductor device using a shallow trench isolation
02/25/2003US6525358 Capacitor having the lower electrode for preventing undesired defects at the surface of the metal plug
02/25/2003US6525357 Barrier layers ferroelectric memory devices
02/25/2003US6525353 Silicon oxynitride and silicon oxide films; pattern accuracy for gate electrode
02/25/2003US6525349 Heterojunction bipolar transistor with tensile graded carbon-doped base layer grown by MOCVD
02/25/2003US6525346 Semiconductor device and its manufacturing method capable of reducing low frequency noise
02/25/2003US6525341 Low- and high defect density amorphous silicon layers
02/25/2003US6525340 Semiconductor device with junction isolation
02/25/2003US6525338 Semiconductor substrate, field effect transistor, method of forming SiGe layer and method of forming strained Si layer using same, and method of manufacturing field effect transistor
02/25/2003US6525327 Ion implanter and beam stop therefor
02/25/2003US6525326 System and method for removing particles entrained in an ion beam
02/25/2003US6525324 Charged-particle-beam projection optical system
02/25/2003US6525318 Methods of inspecting integrated circuit substrates using electron beams
02/25/2003US6525295 Laser imaging apparatus
02/25/2003US6524977 Method of laser annealing using linear beam having quasi-trapezoidal energy profile for increased depth of focus
02/25/2003US6524976 Method of heat-treating nitride compound semiconductor layer and method of producing semiconductor device
02/25/2003US6524975 Combined gate cap or digit line and spacer deposition using HDP
02/25/2003US6524974 Formation of improved low dielectric constant carbon-containing silicon oxide dielectric material by reaction of carbon-containing silane with oxidizing agent in the presence of one or more reaction retardants
02/25/2003US6524973 Method for forming low dielectric constant layer
02/25/2003US6524972 Method for forming an interlayer insulating film, and semiconductor device
02/25/2003US6524971 Method of deposition of films
02/25/2003US6524970 Method for growing a barium titanate layer
02/25/2003US6524968 Method for forming insulating film and for manufacturing integrated circuit
02/25/2003US6524967 Method for incorporating nitrogen into a dielectric layer using a special precursor
02/25/2003US6524966 Surface treatment and protection method for cadmium zinc telluride crystals
02/25/2003US6524965 Cleaning method for semiconductor manufacturing process to prevent metal corrosion
02/25/2003US6524964 Method for forming contact by using ArF lithography
02/25/2003US6524963 In the manufacture of an integrated circuit device; plasma comprising hydrazine gas and a carrier gas
02/25/2003US6524962 Method for forming dual-damascene interconnect structure
02/25/2003US6524961 Semiconductor device fabricating method
02/25/2003US6524960 Use of residual organic compounds to facilitate gate break on a carrier substrate for a semiconductor device
02/25/2003US6524958 Method of forming channel in thin film transistor using non-ionic excited species
02/25/2003US6524957 Method of forming in-situ electroplated oxide passivating film for corrosion inhibition
02/25/2003US6524956 Method for controlling the grain size of tungsten films
02/25/2003US6524955 Method of forming thin film onto semiconductor substrate
02/25/2003US6524954 Reduction of tungsten silicide resistivity by boron ion implantation
02/25/2003US6524952 Method of forming a titanium silicide layer on a substrate
02/25/2003US6524951 Method of forming a silicide interconnect over a silicon comprising substrate and method of forming a stack of refractory metal nitride over refractory metal silicide over silicon
02/25/2003US6524950 Method of fabricating copper damascene
02/25/2003US6524949 Method of forming low-resistance contact electrodes in semiconductor devices
02/25/2003US6524948 Semiconductor device and method for fabricating the same
02/25/2003US6524947 Slotted trench dual inlaid structure and method of forming thereof
02/25/2003US6524946 Method of fabricating a semiconductor device having a contact hole
02/25/2003US6524945 Method of making an anti-reflection structure for a conductive layer in a semiconductor device
02/25/2003US6524944 Low k ILD process by removable ILD
02/25/2003US6524943 Method of forming metal bumps
02/25/2003US6524941 Sub-minimum wiring structure
02/25/2003US6524939 Dual salicidation process
02/25/2003US6524938 Method for gate formation with improved spacer profile control
02/25/2003US6524937 Selective T-gate process
02/25/2003US6524936 Process for removal of photoresist after post ion implantation
02/25/2003US6524935 Preparation of strained Si/SiGe on insulator by hydrogen induced layer transfer technique
02/25/2003US6524933 Methods of manufacturing semiconductor devices that protect interconnect wirings during processing of back substrate surface
02/25/2003US6524932 Method of fabricating group-III nitride-based semiconductor device
02/25/2003US6524931 Method for forming a trench isolation structure in an integrated circuit
02/25/2003US6524930 Method for forming a bottom corner rounded STI
02/25/2003US6524929 Method for shallow trench isolation using passivation material for trench bottom liner
02/25/2003US6524928 Semiconductor device and method for manufacturing the same
02/25/2003US6524927 Semiconductor device and method of fabricating the same
02/25/2003US6524926 Metal-insulator-metal capacitor formed by damascene processes between metal interconnect layers and method of forming same
02/25/2003US6524925 Method of forming a thin-film resistor in a semiconductor wafer
02/25/2003US6524924 Semiconductor device and process of producing the same
02/25/2003US6524923 Integrated adjustable capacitor
02/25/2003US6524922 Semiconductor device having increased breakdown voltage and method of fabricating same
02/25/2003US6524921 Methods of forming bipolar transistor constructions
02/25/2003US6524920 Low temperature process for a transistor with elevated source and drain
02/25/2003US6524919 Method for manufacturing a metal oxide semiconductor with a sharp corner spacer
02/25/2003US6524918 Method for manufacturing a gate structure incorporating therein aluminum oxide as a gate dielectric
02/25/2003US6524917 Method for fabricating an integrated circuit with undercut etching
02/25/2003US6524916 Controlled gate length and gate profile semiconductor device and manufacturing method therefor
02/25/2003US6524915 Split-gate flash memory and method of manufacturing the same
02/25/2003US6524914 Source side boron implanting and diffusing device architecture for deep sub 0.18 micron flash memory
02/25/2003US6524913 Method of fabricating a non-volatile memory with a spacer
02/25/2003US6524912 Planarization of metal container structures
02/25/2003US6524911 Combination of BPTEOS oxide film with CMP and RTA to achieve good data retention
02/25/2003US6524910 Method of forming dual thickness gate dielectric structures via use of silicon nitride layers
02/25/2003US6524909 Self-aligned fabricating process and structure of source line of etox flash memory
02/25/2003US6524908 Method for forming refractory metal-silicon-nitrogen capacitors and structures formed
02/25/2003US6524907 Method of reducing electrical shorts from the bit line to the cell plate
02/25/2003US6524906 Chemical mechanical polishing of polysilicon plug using a silicon nitride stop layer
02/25/2003US6524905 Semiconductor device, and thin film capacitor
02/25/2003US6524904 Method of fabricating semiconductor device
02/25/2003US6524903 Method of manufacturing a semiconductor device having two peaks in an impurity concentration distribution
02/25/2003US6524902 Method of manufacturing CMOS semiconductor device
02/25/2003US6524901 Method for forming a notched damascene planar poly/metal gate
02/25/2003US6524900 Method concerning a junction barrier Schottky diode, such a diode and use thereof
02/25/2003US6524899 Process for forming a large area, high gate current HEMT diode
02/25/2003US6524898 Method of fabricating a protective element in an SOI substrate
02/25/2003US6524896 Semiconductor device and method of fabricating the same
02/25/2003US6524895 Semiconductor device and method of fabricating the same
02/25/2003US6524893 Electrostatic discharge protection device for semiconductor integrated circuit, method for producing the same, and electrostatic discharge protection circuit using the same
02/25/2003US6524892 Method of fabricating multilayer flexible wiring boards
02/25/2003US6524890 Method for manufacturing semiconductor device having element isolation structure
02/25/2003US6524889 Method of transcribing a wiring pattern from an original substrate to a substrate with closely matched thermal expansion coefficients between both substrates for dimensional control of the transcribed pattern
02/25/2003US6524888 Method of attaching a conformal chip carrier to a flip chip
02/25/2003US6524886 Method of making leadless semiconductor package
02/25/2003US6524883 Quantum dot of single electron memory device and method for fabricating thereof
02/25/2003US6524882 Method of producing p-type nitride based III-V compound semiconductor and method of fabricating semiconductor device using the same
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