Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
06/2003
06/24/2003US6583015 Gate technology for strained surface channel and strained buried channel MOSFET devices
06/24/2003US6583014 Horizontal surrounding gate MOSFETS
06/24/2003US6583013 Method for forming a mixed voltage circuit having complementary devices
06/24/2003US6583012 Semiconductor devices utilizing differently composed metal-based in-laid gate electrodes
06/24/2003US6583011 Method for forming damascene dual gate for improved oxide uniformity and control
06/24/2003US6583010 Trench transistor with self-aligned source
06/24/2003US6583009 Innovative narrow gate formation for floating gate flash technology
06/24/2003US6583008 Nonvolatile semiconductor memory device and manufacturing method thereof
06/24/2003US6583007 Reducing secondary injection effects
06/24/2003US6583006 Method to reduce floating grain defects in dual-sided container capacitor fabrication
06/24/2003US6583005 Method of manufacturing a semiconductor memory device with a buried bit line
06/24/2003US6583004 Semiconductor memory device and method for manufacturing the same
06/24/2003US6583003 Method of fabricating 1T1R resistive memory array
06/24/2003US6583002 Semiconductor processing methods of forming integrated circuitry memory devices, methods of forming capacitor containers, methods of making electrical connection to circuit nodes and related integrated circuitry
06/24/2003US6583001 Method for introducing an equivalent RC circuit in a MOS device using resistive paths
06/24/2003US6583000 Process integration of Si1-xGex CMOS with Si1-xGex relaxation after STI formation
06/24/2003US6582999 Controlled cleavage process using pressurized fluid
06/24/2003US6582998 Method for fabricating nonvolatile semiconductor memory device
06/24/2003US6582997 ESD protection scheme for outputs with resistor loading
06/24/2003US6582996 Semiconductor thin film forming method
06/24/2003US6582995 Method for fabricating a shallow ion implanted microelectronic structure
06/24/2003US6582994 Passivation layer for packaged integrated circuits
06/24/2003US6582993 Method of underfilling semiconductor device
06/24/2003US6582991 Semiconductor device and method for fabricating the same
06/24/2003US6582990 Wafer level underfill and interconnect process
06/24/2003US6582989 Photolithographically-patterned out-of-plane coil structures and method of making
06/24/2003US6582988 Method for forming micro lens structures
06/24/2003US6582986 Single step pendeo-and lateral epitaxial overgrowth of group III-nitride epitaxial layers with group III-nitride buffer layer and resulting structures
06/24/2003US6582983 Method and wafer for maintaining ultra clean bonding pads on a wafer
06/24/2003US6582982 Composition for wiring, a wiring using the composition, manufacturing method thereof, a display using the wiring and a manufacturing method thereof
06/24/2003US6582981 Method of using a tunneling diode in optical sensing devices
06/24/2003US6582978 Position detection mark and position detection method
06/24/2003US6582976 Semiconductor device manufacturing method capable of reliable inspection for hole opening and semiconductor devices manufactured by the method
06/24/2003US6582975 Method of controlling the deposition of inter-level dielectric layers based upon electrical performance tests, and system for accomplishing same
06/24/2003US6582974 Method for forming a dual damascene aperture while employing a peripherally localized intermediate etch stop layer
06/24/2003US6582973 Method for controlling a semiconductor manufacturing process
06/24/2003US6582972 Low temperature oxidizing method of making a layered superlattice material
06/24/2003US6582891 Process for reducing edge roughness in patterned photoresist
06/24/2003US6582889 A two layer structure resist pattern with a T-shaped cross section, overhang portions is heat treated so that it inclines downward
06/24/2003US6582883 Organic anti-reflective coating polymer, anti-reflective coating composition and methods of preparation thereof
06/24/2003US6582860 Transferring the images of openings onto photoresists
06/24/2003US6582827 Glass; high and low conductivity layers; subsurface melting layer as heat reservoir; semiconductors
06/24/2003US6582777 Exposure to radiation
06/24/2003US6582767 Microstamping pattern of alkanethiol to surface; surface treating silicon polymer with aqueous solution of metal salt; electroless deposition
06/24/2003US6582761 Condensation and coupling of organometallic and/or organosilicon compound
06/24/2003US6582757 Method for tungsten deposition without fluorine-contaminated silicon substrate
06/24/2003US6582660 Control system for active programmable electronic microbiology system
06/24/2003US6582623 CMP composition containing silane modified abrasive particles
06/24/2003US6582619 Methods and apparatuses for trench depth detection and control
06/24/2003US6582618 Method of determining etch endpoint using principal components analysis of optical emission spectra
06/24/2003US6582617 Plasma etching using polycarbonate mask and low-pressure high density plasma
06/24/2003US6582616 Method for preparing ball grid array board
06/24/2003US6582580 Substrate plating apparatus
06/24/2003US6582579 Methods for repairing defects on a semiconductor substrate
06/24/2003US6582578 Method and associated apparatus for tilting a substrate upon entry for metal deposition
06/24/2003US6582569 A DC magnetron sputter reactor for sputtering copper, its method of use, and shields and other parts promoting self-ionized plasma (SIP) sputtering. Also, a method of coating copper into a narrow and deep via or trench using SIP
06/24/2003US6582568 A fixture configured to position a wafer adjacent a plasma; a first target comprising a metal; a second target comprising a first material; and a sputtering device adapted to (i) sputter said metal from said first target onto a surface of said wafer
06/24/2003US6582551 Apparatus for plasma etching having rotating coil responsive to slide valve rotation
06/24/2003US6582541 Monolithic ceramic substrate, manufacturing and designing methods therefor, and electronic device
06/24/2003US6582525 Condensing steam on first surface to form a liquid boundary layer, to heat the surface, ozone diffuses through the boundary layer and reacts with material on the surface, maintaining condensation of steam; cleaning wafers
06/24/2003US6582524 Dipping a wafer in a washing solution; replacing the washing solution by first chemical solution containing ammonia, hydrogen peroxide, water, dipping the wafer in this solution, eplacing first with second solution lower in concentration
06/24/2003US6582512 Method of forming three-dimensional photonic band structures in solid materials
06/24/2003US6582296 Ventilating method and ventilating system for semiconductor manufacturing apparatuses
06/24/2003US6582288 Diaphragm for chemical mechanical polisher
06/24/2003US6582281 Semiconductor processing methods of removing conductive material
06/24/2003US6582280 Fine particulate of quartz and chelating agent is blown mainly against a rear surface opposite from an element forming surface of a wafer to create mechanically induced strain in the wafer
06/24/2003US6582279 Apparatus and method for reclaiming a disk substrate for use in a data storage device
06/24/2003US6582223 Pickup apparatus for semiconductor chips
06/24/2003US6582221 Wafer boat and method for treatment of substrates
06/24/2003US6582182 Semiconductor wafer storage kiosk
06/24/2003US6582178 Mini-modual manufacturing environmental
06/24/2003US6582175 Robot for handling semiconductor wafers
06/24/2003US6582174 Substrate processing apparatus and substrate processing method
06/24/2003US6582137 Polyimide coating process with dilute TMAH and DI-water backrinse
06/24/2003US6582085 Semiconductor chip and its manufacturing method
06/24/2003US6581820 Lead bonding method for SMD package
06/24/2003US6581817 Die bonding device
06/24/2003US6581816 Capillary for bonding copper wires between a semiconductor circuit chip and a corresponding terminal connector of a semiconductor device
06/24/2003US6581635 Pilot-type two-port vacuum valve
06/24/2003US6581623 Auto-switching gas delivery system utilizing sub-atmospheric pressure gas supply vessels
06/24/2003US6581586 Cutting machine
06/24/2003US6581283 Method for forming pin-form wires and the like
06/24/2003US6581280 Method for filling high aspect ratio via holes in electronic substrates
06/24/2003US6581279 Method of collectively packaging electronic components
06/24/2003US6581278 Process and support carrier for flexible substrates
06/24/2003US6581275 Fabricating an electrostatic chuck having plasma resistant gas conduits
06/24/2003US6581264 Transportation container and method for opening and closing lid thereof
06/24/2003CA2228552C Wafer processing apparatus and method, wafer convey robot, semiconductor substrate fabrication method, and semiconductor fabrication apparatus
06/24/2003CA2222602C Electronic modules manufacturing
06/19/2003WO2003050909A1 Circuit board device and its manufacturing method
06/19/2003WO2003050884A1 Dual gate oxide high-voltage semiconductor device and method for forming the same
06/19/2003WO2003050883A2 Silicon on insulator device and method of making the same
06/19/2003WO2003050881A2 Super self-aligned collector device for mono-and hetero bipolar junction transistors, and method of making same
06/19/2003WO2003050879A1 Trenched semiconductor devices and their manufacture
06/19/2003WO2003050876A2 Self aligned compact bipolar junction transistor layout, and method of making same
06/19/2003WO2003050871A1 Mos semiconductor device
06/19/2003WO2003050870A1 Diffusion barrier
06/19/2003WO2003050869A1 Packaged integrated circuit and method therefor
06/19/2003WO2003050868A2 Method for producing a layered assembly and a layered assembly
06/19/2003WO2003050867A2 Planarity detection methods and apparatus for electrochemical mechanical processing systems